Static Timing Analysis Engineer
14 hours ago
Description :
Job Title : STA Engineer
Location : Bangalore, India
Experience : 4 years
Job Overview :
We are seeking a highly skilled Design Verification and Static Timing Analysis (STA) Engineer with expertise in scan, ATPG, and SV UVM methodologies, as well as pre- and post-layout STA.
The ideal candidate will be responsible for ensuring the timing closure of complex SoCs, integrating IP-level constraints, and developing custom scripts for timing fixes.
Key Responsibilities :
Scan & ATPG :
- End-to-end experience in scan chain insertion, ATPG pattern generation, and post-silicon validation.
- Collaborate with design and verification teams to ensure full coverage and fault-free designs.
SV UVM Verification :
- Develop and maintain SV UVM testbenches for functional verification of IPs and SoCs.
- Create reusable verification components, sequences, and monitors to validate design functionality.
- Work closely with design engineers to debug functional issues and ensure compliance with specifications.
STA & Timing Closure :
- Develop pre-layout and post-layout constraints to achieve timing closure at full-chip level.
- Integrate IP-level constraints into the full-chip STA methodology.
- Perform DMSA (Design Margin Static Analysis) and implement timing fixes using custom scripts.
Technical Skills :
- Strong hands-on experience in scan and ATPG methodologies.
- Proficiency in SV UVM for functional verification.
- STA tool expertise and constraint development experience.
- Scripting experience (Perl, TCL, Python) for automation and timing fixes.
Qualifications :
- Bachelors or Masters degree in Electronics, VLSI, or related field.
- Minimum 4 years of experience in VLSI design verification, SV UVM, or STA.
- Strong problem-solving skills and ability to work independently and in teams.
Why Join Us :
- Opportunity to work on cutting-edge SoC designs.
- Collaborative environment with experienced VLSI engineers.
- Career growth and exposure to advanced design verification and timing methodologies.
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