Static Timing Analysis

19 hours ago


Bengaluru Karnataka India, Karnataka LeadSoc Technologies Pvt Ltd Full time

Static Timing Analysis (STA) Engineer Job DescriptionJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and physical design teams to achieve the target operating frequency and performance metrics. Key ResponsibilitiesTiming Sign-off and AnalysisTiming Closure Ownership: Drive all aspects of timing closure from pre-layout to post-layout for blocks, sub-systems, and/or the full chip.Constraint Management: Develop, validate, and maintain Synopsys Design Constraints (SDC) and timing constraints for all functional and test modes (e.g., Scan, MBIST).MMMC Analysis: Perform comprehensive timing analysis across multiple operating corners (Process, Voltage, Temperature - PVT) and various modes (Multi-Mode Multi-Corner).Critical Path Identification: Analyze timing reports to identify and debug critical paths and resolve all Setup and Hold violations.Signal Integrity (SI) & Noise: Incorporate advanced timing effects such as on-chip variation (OCV), signal integrity (crosstalk), and voltage drop (IR-drop aware STA) into the sign-off process.Required Qualifications and SkillsEducationBachelor's or Master's degree in Electrical Engineering (EE), Electronics Engineering, VLSI, or a related field.Technical Skills & ExperienceExperience: 3+ years of experience in physical design, with a proven track record of tape-outs in advanced process nodes (e.g., 16nm, 7nm, 5nm, or lower).EDA Tools: Expert proficiency with industry-standard Electronic Design Automation (EDA) tools from vendors like Synopsys (e.g., Fusion Compiler, ICC2, Primetime), Cadence (e.g., Innovus), or Mentor Graphics.Soft SkillsExcellent analytical, debugging, and problem-solving skills.Strong verbal and written communication skills.Ability to work effectively in a team environment and collaborate across different engineering disciplines.Experience Level :- 3yrs to 15yrsNotice Period :- Immediate to 60 DaysWork Location :- BangaloreMode of Work :- WFOEmployment Type :- Permanent


  • Static Timing Analysis

    19 hours ago


    Bengaluru, Karnataka, India, Karnataka LeadSoc Technologies Pvt Ltd Full time

    Static Timing Analysis (STA) EngineerJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...


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