Static Analysis Engineer

Hi Folks,Please find here JD for your reference.Work Location: BangaloreStatic Timing Analysis Engineer – Exp 8 yrs and higher.Job description :1.    STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs.2.    Timing analysis, validation and debug across multiple PVT conditions using Tempus or Primetime at chip...

Key Skills: Static Timing Analysis,PrimeTimeRoles and Responsibilities:Conduct block-level and full-chip static timing analysis across all phases of development.Develop timing methodologies and infrastructure from RTL synthesis to timing closure.Collaborate with architects and designers to define block and chip-level timing constraints.Define analysis...

Description : Job Title : STA Engineer Location : Bangalore, India Experience : 4 yearsJob Overview : We are seeking a highly skilled Design Verification and Static Timing Analysis (STA) Engineer with expertise in scan, ATPG, and SV UVM methodologies, as well as pre- and post-layout STA. The ideal candidate will be responsible for ensuring the...

Static Timing Analysis (STA) LeadLocation: Bangalore, KAExperience: 7–18 YearsBudget: Up to 30 LPA (DoE)Industry: Semiconductors | ASIC | SoC | AI/Networking ChipsJob Type: Full-TimeJob OverviewWe are seeking a highly skilled Static Timing Analysis (STA) Lead to drive timing closure for large-scale, high-performance ASIC/SoC designs. The ideal candidate...

Static Timing Analysis (STA) EngineerJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...

Static Timing Analysis (STA) Engineer Job DescriptionJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with...

Overview:This job is for Ststic EngineerResponsibilities:The translation of customer specifications into engineering solutions including the identification and mitigation of technical risk.The production of engineering calculations that are necessary to support any conceptual or detail engineering solution for which they are responsible.The detailing of...

ResponsibilitiesThe translation of customer specifications into engineering solutions including the identification and mitigation of technical risk.The production of engineering calculations that are necessary to support any conceptual or detail engineering solution for which they are responsible.The detailing of engineering solutions in accordance with...

We are seeking an experienced Lead STA Engineer to take ownership of the static timing closure process for complex ASIC/SoC designs. In this role, you will lead timing sign-off activities, coordinate with cross-functional teams, and ensure designs meet performance, power, and area targets while achieving first-pass silicon success.Key Responsibilities:Own...

Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.8 years of experience with Static Timing Analysis, Constraints development and its validation, sign-off corner definitions, process margining, and setup of frequency goals with technology growth...