Static Timing Analysis Engineer

Hi Folks,Please find here JD for your reference.Work Location: BangaloreStatic Timing Analysis Engineer – Exp 8 yrs and higher.Job description :1.    STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs.2.    Timing analysis, validation and debug across multiple PVT conditions using Tempus or Primetime at chip...

Description : Job Title : STA Engineer Location : Bangalore, India Experience : 4 yearsJob Overview : We are seeking a highly skilled Design Verification and Static Timing Analysis (STA) Engineer with expertise in scan, ATPG, and SV UVM methodologies, as well as pre- and post-layout STA. The ideal candidate will be responsible for ensuring the...

Key Skills: Static Timing Analysis,PrimeTimeRoles and Responsibilities:Conduct block-level and full-chip static timing analysis across all phases of development.Develop timing methodologies and infrastructure from RTL synthesis to timing closure.Collaborate with architects and designers to define block and chip-level timing constraints.Define analysis...

Static Timing Analysis (STA) EngineerJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...

Static Timing Analysis (STA) Engineer Job DescriptionJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with...

Description :We are seeking a highly skilled STA Engineer with strong experience in Static Timing Analysis, convergence, and signoff for complex multi-mode, multi-voltage domain designs. The ideal candidate should possess in-depth knowledge of STA tools such as Tempus or Primetime, and have a solid understanding of timing closure, cross-talk noise, and...

Company:Qualcomm India Private LimitedJob Area:Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware...

Experience: 5+yearsLocation: BangaloreJob Description:As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process...

Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.8 years of experience with Static Timing Analysis, Constraints development and its validation, sign-off corner definitions, process margining, and setup of frequency goals with technology growth...

Experience: 5+yearsLocation: BangaloreJob Description:As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process...