
Static Timing Analysis
6 days ago
We're Hiring – STA Engineer (Tempus Experience)
|
#Bangalore
Join
Mirafra Technologies
, a leading name in
VLSI design and innovation
, and be part of a dynamic engineering team
Position:
STA Engineer
Experience:
4+ Years
Location:
Bangalore
Key Skills & Responsibilities:
- Strong working knowledge of
Synthesis, LEC, and STA
concepts. - Hands-on experience in
block-level synthesis
,
timing signoff
, and
ECO generation
. - Provide feedback to RTL teams on
lint
and
timing issues
. - Must have experience with
Cadence Genus, Conformal, and Tempus
tools. - Proficient in
TCL
and
Python
scripting. - Solid understanding of
multi-clock domain timing
,
OCV/AOCV/SOCV
, and
clock tree concepts
. - Excellent communication skills and problem-solving aptitude.
-
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