RTL Engineer, Networking ASIC

Job Description:Own RTL design of SoC-level or large subsystems from specification to silicon bring-up.Define and implement micro-architecture; write high-quality, synthesizable RTL in SystemVerilog/Verilog.Work closely with physical design teams for synthesis, timing closure, power, area optimization, DFT hooks, and ECOs.Drive block/subsystem integration...

Greetings of the dayThis is regarding a Job opportunity with eInfochips as we are having a position of ASIC RTL DESIGN ENGINEERSExperience- 5+ YearsLocation- Bangalore, AhmedabadJob Description:Experience in RTL designVerilog/VHDLSimulation tools, Modeslim/VCS etc.Basic protocols, I2C, UART, PCIe, SPI etc.Micro-Architecture experience is a plusCDC/Lint...

The ASIC RTL Design Lead Engineer will lead the design and development of RTL for high-performance, low-power ASICs. The candidate will be responsible for architecting, designing, and implementing digital circuits using industry-standard RTL design methodologies. This individual will also manage a team of design engineers, provide technical leadership, and...

Senior RTL Design Engineer DSP / ASIC / FPGAExperience: 10 to 15 yearsLocation: Bangalore (On-site)Employment Type: Full-time / PermanentAbout the RoleWe are seeking a highly skilled Senior RTL Design Engineer to join our digital design team. The selected candidate will be responsible for the RTL design and development of signal processing pipelines for...

Summary:Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon bring-up.Responsibilities:Define micro-architecture from specs; write high-quality synthesizable SystemVerilog/Verilog RTL for SoC-level or large subsystems.Own design bring-up, block/subsystem integration, and close on timing,...

Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.3 years of experience with Register-Transfer Level (RTL) design and integration using Verilog/System Verilog, microarchitecture and automation.3 years of experience with the Register-Transfer Level...

Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.3 years of experience with Register-Transfer Level (RTL) design and integration using Verilog/System Verilog, microarchitecture and automation.3 years of experience with the Register-Transfer Level...

Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.3 years of experience in ASIC design flows and methodologies, IP...

Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.3 years of experience in ASIC design flows and methodologies, IP...

Opportunity With Tessolve Semiconductor- BangaloreHi All,we are hiring RTL design engineer and design verification engineer for Bangalore location.Exp: 5+ yr expSkills: RTL ASIC, CDC, Lint, Synthesis, SpyglassWe are hiring for RTL ASIC engineerwork experience in ASIC/IP Design.Experience in Logic design / RTL designExperience is IP design and...