ASIC RTL Design Engineer, Silicon

Summary:We are looking for an experienced Senior/Principal ASIC RTL Design Engineer with 10+ years of hands-on RTL design expertise to join our team in Bangalore. The ideal candidate will own end-to-end RTL design for complex SoCs or large subsystems, from micro-architecture through tapeout and silicon bring-up.Job Description:Own RTL design of SoC-level or...

Job Description:Own RTL design of SoC-level or large subsystems from specification to silicon bring-up.Define and implement micro-architecture; write high-quality, synthesizable RTL in SystemVerilog/Verilog.Work closely with physical design teams for synthesis, timing closure, power, area optimization, DFT hooks, and ECOs.Drive block/subsystem integration...

Minimum qualifications:Bachelor's degree in Electrical/Computer Engineering or equivalent practical experience.2 years of experience with RTL design using Verilog/System Verilog and microarchitecture.Experience in ARM-based SoCs, interconnects and ASIC methodology.Preferred qualifications:Master's degree in Electrical/Computer Engineering.Experience with...

Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.3 years of experience in ASIC design flows and methodologies, IP...

Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.3 years of experience in ASIC design flows and methodologies, IP...

Summary:Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon bring-up.Responsibilities:Define micro-architecture from specs; write high-quality synthesizable SystemVerilog/Verilog RTL for SoC-level or large subsystems.Own design bring-up, block/subsystem integration, and close on timing,...

Minimum qualifications:Bachelor's degree in Electrical Engineering or Computer Engineering, or equivalent practical experience.15 years of experience in ASIC RTL design integration.Experience in Verilog or Systemverilog coding.Experience in High performance design, Multi power domains with clocking of multiple SoCs with silicon.Preferred...

Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.3 years of experience in ASIC design flows and methodologies, IP...

Senior RTL Design Engineer DSP / ASIC / FPGAExperience: 10 to 15 yearsLocation: Bangalore (On-site)Employment Type: Full-time / PermanentAbout the RoleWe are seeking a highly skilled Senior RTL Design Engineer to join our digital design team. The selected candidate will be responsible for the RTL design and development of signal processing pipelines for...

Job InformationJob Opening IDZR_174_JOBIndustrySemiconductorDate Opened09/10/2025Job TypeFull timeWork Experience8+ YearsCityBangaloreState/ProvinceKarnatakaCountryIndiaZip/Postal Code560078Job DescriptionSummary:Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon...