DFT Lead Engineer ASIC/SoC
1 day ago
DFT Lead Engineer ASIC/SoC
About the Company:
Aevas mission is to bring the next wave of perception to a broad range of applications — from automated driving to industrial robotics, consumer electronics, and beyond.
Aeva's groundbreaking 4D LiDAR technology integrates key LiDAR components onto a single silicon photonics chip, enabling devices to sense both position and instant velocity for safer, smarter decision-making.
Role Overview:
As a DFT Lead Engineer, you will define, develop, and optimize Design-For-Test architecture for Aeva's high-performance LiDAR SoCs. You'll own the end-to-end DFT strategy — from planning and insertion to verification, silicon bring-up, and yield improvement.
Key Responsibilities:
- Define, develop, and implement DFT methodologies for complex SoC/ASIC designs.
- Own DFT planning, insertion, verification, and validation at block and top level.
- Collaborate with RTL, Physical Design, and ASIC vendors to ensure full test coverage for automotive-grade silicon.
- Integrate and verify IP-level DFT implementation across the SoC.
- Support post-silicon bring-up, debug, failure analysis, and yield improvement.
- Maintain DFT documentation, test guidelines, and architecture specs.
Required Skills and Experience:
- 12+ years of experience developing and implementing DFT architecture for complex ASIC/SoC designs.
- Deep expertise in SCAN/ATPG, MBIST/LBIST, JTAG (IEEE 1149.x/1500/1687), Boundary Scan, and compression/decompression methods.
- Proficiency with Mentor Tessent or Synopsys DFTMAX tool suites.
- Hands-on scripting skills (Python, Perl, TCL) for automation.
- Strong understanding of RTL coding, DFT constraints (SDC), and design flows.
- Recent tape-out experience at advanced technology nodes (7 nm or below preferred).
Nice to Have:
- Experience with automotive-grade SoCs, AEC-Q100 qualification, or ISO 26262 compliance.
- Familiarity with mixed-signal DFT and analog test strategies.
- Exposure to post-silicon validation and diagnostic firmware development.
Education:
B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Design Engineering.
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