
ASIC STA Engineer
4 days ago
Job Description:
">Eteros is a Semiconductor Engineering services company that works on cutting-edge technology nodes. We are looking for an experienced ASIC STA Engineer to join our team and lead the synthesis, static timing, and DFT efforts for an advanced mixed-signal chip.
">About Us:
">We are a highly respected company in the semiconductor industry with a strong presence in the Silicon Valley and India. Our engineers work on state-of-the-art designs in various domains including AI/ML, Datacenter, Automotive, and 5G.
">Your Role:
">You will be part of a highly talented team responsible for providing integrated solutions into a growth industry. As a Sr ASIC STA Engineer, you will have full chip and block level timing closure ownership throughout the project cycle.
">Key Qualifications:
">- ">
- Thorough knowledge of the ASIC design timing closure flow and methodology.">
- Expertise in STA tools (Tempus and Primetime) and methodologies for timing closure with a good understanding of OCV, noise, and crosstalk effects on timing.">
- Familiarity with all aspects of timing closure of high-performance, mixed-signal SoCs in advanced finFET technology nodes, preferably 7nm.">
- Knowledge of timing corners/modes and process variations.">
- Knowledge of low-power techniques including clock gating, power gating, and millivoltage designs. Proficient in scripting languages (Tcl and Perl).">
- ECO timing flow.">
- Strong communication skills as you will interface with different groups.">
- Familiarity with RTL, synthesis, logic equivalence, DFT, floor-planning, and backend related methodology and tools.">
- Able to solve complex problems and independently drive tasks to completion.">
- Able to work under limited supervision and take complete accountability.">
Benefits:
">Work on leading edge technologies
">An opportunity for career development and growth
">Competitive compensation
">Medical Benefits and more
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