Lead Static Timing Analysis

Job DescriptionHand-on experience and Comprehensive knowledge of Static Timing Analysis.Hands-on experience in Logical aware Synthesis, Logical Equivalence check and, Static Timing analysis.Hands-on the DMSA flow to fix pre and post STA timing.Knowledge in the Timing closure on Sub-system level & Block level and Chip level.Knowledge in writing Manual ECOs to...

Static Timing Analysis (STA) Engineer Job DescriptionJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with...

Job Title : STA Lead Full-Chip Static Timing AnalysisExperience Required : 8+ YearsLocation : Bangalore, IndiaJob Mode : Work From Office (WFO)Industry : Semiconductors / VLSI / ASIC the Role :We are looking for a highly skilled and experienced STA Lead Engineer to join our SoC/ASIC design team in Bangalore. As an STA Lead, you will be responsible for...

Static Timing Analysis (STA) EngineerJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...

Static Timing Analysis (STA) Engineer Job DescriptionJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with...

We are seeking an experienced Lead STA Engineer  to take ownership of the static timing closure process for complex ASIC/SoC designs. In this role, you will lead timing sign-off activities, coordinate with cross-functional teams, and ensure designs meet performance, power, and area targets while achieving first-pass silicon success. Key Responsibilities: ...

Hi Folks,Please find here JD for your reference.Work Location: BangaloreStatic Timing Analysis Engineer – Exp 8 yrs and higher.Job description :1.    STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs.2.    Timing analysis, validation and debug across multiple PVT conditions using Tempus or Primetime at chip...

Key Skills: Static Timing Analysis,PrimeTimeRoles and Responsibilities:Conduct block-level and full-chip static timing analysis across all phases of development.Develop timing methodologies and infrastructure from RTL synthesis to timing closure.Collaborate with architects and designers to define block and chip-level timing constraints.Define analysis...

Description : Job Title : STA Engineer Location : Bangalore, India Experience : 4 yearsJob Overview : We are seeking a highly skilled Design Verification and Static Timing Analysis (STA) Engineer with expertise in scan, ATPG, and SV UVM methodologies, as well as pre- and post-layout STA. The ideal candidate will be responsible for ensuring the...

Static Timing Analysis (STA) EngineerJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (So Cs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...