Sta Synthesis Sr Engineer/lead/staff

4 weeks ago


Bangalore Karnataka, India Qualcomm Full time

Company Qualcomm India Private Limited Job Area Engineering Group Engineering Group Hardware Engineering General Summary As a leading technology innovator Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drives digital transformation to help create a smarter connected future for all As a Qualcomm Hardware Engineer you will plan design optimize verify and test electronic systems bring-up yield circuits mechanical systems Digital Analog RF optical systems equipment and packaging test systems FPGA and or DSP systems that launch cutting-edge world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications o Bachelor s degree in Computer Science Electrical Electronics Engineering Engineering or related field and 4 years of Hardware Engineering or related work experience OR Master s degree in Computer Science Electrical Electronics Engineering Engineering or related field and 3 years of Hardware Engineering or related work experience OR PhD in Computer Science Electrical Electronics Engineering Engineering or related field and 2 years of Hardware Engineering or related work experience Requirements Looking for a highly talented and a technically strong leader with an eye for quality to lead a high performing and talented team of engineers in the implementation domain for Display Sub-System Able to handle multiple project execution that are time critical and complex Able to communicate effectively with all stakeholders across the organization Able to collaborate with cross functional teams for upholding the best practices and enabling smooth execution Focus on improving execution efficiency and improve on the optimizations in area power and performance Able to grow the team in terms of technical depth and size as we do more and more projects Able to innovate and bring fresh ideas Bachelor s or master s degree in engineering with 3 Years of experience Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools Experience with writing timing constraints for synthesis STA timing closure and pipelining at different levels for performance optimization and timing closure Experience in all aspects of timing closure for multi-clock domain designs Should be familiar with MCMM synthesis and optimization Should have good understanding of low-power design implementation using UPF Experience with scripting language such as Perl Python TCL Experience with different power optimization flows or technique such as clock gating Should be able to work independently with design DFT and PD team for netlist delivery timing constraints validation Should be able to handle ECOs and formal verification and maintain high quality matrix Responsibilities include Synthesis LEC Low power checks Memory BIST insertion Constraints validation Development of signoff quality constraints and the development of power intent constraints May also include running RTL Lint CLP MEMBIST DFT DRC etc TCL script development in addition to running analyzing debugging designs Hands on with Synopsys DCG Genus Fusion Compiler Hands on with Synopsys Prime Time including constraint development for complex blocks with multiple clock domains Hands on with Cadence Conformal LEC and Cadence Conformal Low Power including UPF development Experience with either RTL development or Physical Design is also a plus Applicants Qualcomm is an equal opportunity employer If you are an individual with a disability and need an accommodation during the application hiring process rest assured that Qualcomm is committed to providing an accessible process You may e-mail or call Qualcomm s toll-free number found Upon request Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process Qualcomm is also committed to making our workplace accessible for individuals with disabilities Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities We will not respond here to requests for updates on applications or resume inquiries Qualcomm expects its employees to abide by all applicable policies and procedures including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and or proprietary information to the extent those requirements are permissible under applicable law To all Staffing and Recruiting Agencies Our Careers Site is only for individuals seeking a job at Qualcomm Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles applications or resumes and any such submissions will be considered unsolicited Qualcomm does not accept unsolicited resumes or applications from agencies Please do not forward resumes to our jobs alias Qualcomm employees or any other company location Qualcomm is not responsible for any fees related to unsolicited resumes applications If you would like more information about this role please contact



  • bangalore district, India ACL Digital Full time

    Looking for STA & Synthesis Engineer. Exp.-3.5+yrs. Job Location- Bangalore. Notice Period- Prefer Immediate joiner or less notice period. Netlist and constraint sign in checks and validation. Responsible to complete synthesis till final-opt with DFT insertion Experience with sign-off Static Timing Analysis, Logic equivalency checks, and Static Low Power...


  • Bangalore Division, India ACL Digital Full time

    Looking for STA & Synthesis Engineer. Exp.-3.5+yrs. Job Location- Bangalore. Notice Period- Prefer Immediate joiner or less notice period. Netlist and constraint sign in checks and validation. Responsible to complete synthesis till final-opt with DFT insertion Experience with sign-off Static Timing Analysis, Logic equivalency checks, and Static Low Power...


  • Bangalore, Bengaluru, Hyderabad, India Newsoft Consultants Full time ₹ 12,00,000 - ₹ 36,00,000 per year

    • SoC/Blocks Synthesis/STA methodology & flow for meeting PPA goals• Work with Backend team in realizing PPA goals during PnR & IP & SoC Design team in optimizing the design to meet PPA goals.• Feedback on design issues & solutions. Required Candidate profile• Exp in front end design implementation.• Design flows like Synthesis, Constraint Devel.,...


  • Bangalore, India ACL Digital Full time

    Looking for STA & Synthesis Engineer. Exp.-3.5+yrs. Job Location- Bangalore. Notice Period- Prefer Immediate joiner or less notice period. - Netlist and constraint sign in checks and validation. - Responsible to complete synthesis till final-opt with DFT insertion - Experience with sign-off Static Timing Analysis, Logic equivalency checks, and Static Low...

  • Lead STA

    2 weeks ago


    bangalore, India Cadence System Design and Analysis Full time

    BE /BtechEXp- 5- 12 YrsWork on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm.• Take ownership of one or more physical design blocks includes all of, floorplan, CTS, PNR, QRC, STA, PV & IR.• Contribute to design methodology, flow automation.• Innovate & implement Power, Performance and Area optimization...

  • Lead STA

    2 weeks ago


    Bangalore, India Cadence System Design and Analysis Full time

    BE /Btech EXp- 5- 12 Yrs Work on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm. • Take ownership of one or more physical design blocks includes all of, floorplan, CTS, PNR, QRC, STA, PV & IR. • Contribute to design methodology, flow automation. • Innovate & implement Power, Performance and Area...

  • Lead STA

    1 week ago


    bangalore district, India Cadence System Design and Analysis Full time

    BE /Btech EXp- 5- 12 Yrs Work on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm. • Take ownership of one or more physical design blocks includes all of, floorplan, CTS, PNR, QRC, STA, PV & IR. • Contribute to design methodology, flow automation. • Innovate & implement Power, Performance and Area...


  • bangalore, India L&T Technology Services Full time

    L&T Technology is looking to hire for STA Engineers. Job Location : Bangalore Detailed JD is below ::JD For STA Engineer-6+ ’ experience • Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs. • Can work closely with FE team for constraints development and constraints cleanup. • Work with...


  • bangalore, India L&T Technology Services Full time

    L&T Technology is looking to hire for STA Engineers. Job Location : Bangalore Detailed JD is below :: JD For STA Engineer-6+ ’ experience • Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs. • Can work closely with FE team for constraints development and constraints cleanup. • Work with...

  • STA Engineer

    5 days ago


    Bangalore, India ACL Digital Full time

    Role: STA Engineer Experience: 3+ Years Location: Bangalore (Onsite) Notice Period: Immediate to 30 Days / Serving Notice Key Responsibilities: Perform Static Timing Analysis (STA) at block and full-chip levels across multiple design stages (synthesis, P&R, sign-off). Develop, validate, and maintain timing constraints (SDC files) for complex SoC and IP-level...