Sta, Synthesis

Dear Candidate,We are hiring for our esteemed client for the role STA & Synthesis Engineer.Exp - 3+ YearsNP - Immediate to 15 DaysLocation - Bangalore, Hyd (WFO)JD -Synthesis & STA Engineers:Synthesis & STA engineers will perform RTL Synthesis to achieve the best Performance/Power/Area of the designs, DFT insertions that include MBIST and SCAN, setup Timing...

4+ years experience in STA/SynthesisHand-on Experience and Comprehensive knowledge of Synthesis and Static Timing Analysis.Synthesis Quality with FE Inputs, LEC environment, UPF Cleanup, Generic Partition level UPF ? and VCLP Signoff.USER mode SDC (will have generic dft constraints), Generic DFT SDC, GCA, Flat Timing convergence, Timing Signoff, Merging...

Write and implement block level and top-level constraints for Synthesis Static Timing Analysis In your new role you will Implement high-performance low-power and area-efficient digital designs Write and implement block level and top-level constraints for Synthesis Static Timing Analysis Optimize designs for power performance and area and meet...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our...

Job Description Write and implement block level and top-level constraints for Synthesis, Static Timing Analysis. Job Description - In your new role you will: - Implement high-performance, low-power, and area-efficient digital designs. - Write and implement block level and top-level constraints for Synthesis, Static Timing Analysis. - Optimize designs for...

Write and implement block level and top-level constraints for Synthesis, Static Timing Analysis.Job Description In your new role you will:Implement high-performance, low-power, and area-efficient digital designs.Write and implement block level and top-level constraints for Synthesis, Static Timing Analysis .Optimize designs for power, performance, and area,...

WHAT YOU DO AT AMD CHANGES EVERYTHINGAt AMD, our mission is to build great products that accelerate next-generation computing experiences – from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create...

BE /BtechEXp- 5- 12 YrsWork on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm.• Take ownership of one or more physical design blocks includes all of, floorplan, CTS, PNR, QRC, STA, PV & IR.• Contribute to design methodology, flow automation.• Innovate & implement Power, Performance and Area optimization...

STA Location: Bangalore **Job Description**: - At least 4-5years of actual industry experience. - Good Experience with writing constraints. - Analyzing timing reports. - Basic scripting knowledge. - Basic understanding of RTL. - Experience with PT(Primetime) and can write DC/PT timing constraints. - Collaborate with physical design and synthesis teams to...

BE /Btech EXp- 5- 12 Yrs Work on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm. - Take ownership of one or more physical design blocks includes all of, floorplan, CTS, PNR, QRC, STA, PV & IR. - Contribute to design methodology, flow automation. - Innovate & implement Power, Performance and Area optimization...