STA Synthesis Engineer
2 weeks ago
L&T Technology is looking to hire for STA Engineers. Job Location : Bangalore Detailed JD is below :: JD For STA Engineer-6+ ’ experience • Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs. • Can work closely with FE team for constraints development and constraints cleanup. • Work with partitions/block owner to give timing ECO for timing closure. • Knowledge of advanced timing closure techniques and methodology • Knowledge of industry stanrd tools from Synops or Cadence. • Worked on DSM technologies, tsmc 5nm and below experience preferred. • Minimum 5+ of relevant experience • Good scripting and communication skills
-
STA & Synthesis Engineer
2 weeks ago
bangalore district, India ACL Digital Full timeLooking for STA & Synthesis Engineer. Exp.-3.5+yrs. Job Location- Bangalore. Notice Period- Prefer Immediate joiner or less notice period. Netlist and constraint sign in checks and validation. Responsible to complete synthesis till final-opt with DFT insertion Experience with sign-off Static Timing Analysis, Logic equivalency checks, and Static Low Power...
-
STA & Synthesis Engineer
2 weeks ago
Bangalore Division, India ACL Digital Full timeLooking for STA & Synthesis Engineer. Exp.-3.5+yrs. Job Location- Bangalore. Notice Period- Prefer Immediate joiner or less notice period. Netlist and constraint sign in checks and validation. Responsible to complete synthesis till final-opt with DFT insertion Experience with sign-off Static Timing Analysis, Logic equivalency checks, and Static Low Power...
-
▷ [High Salary] STA & Synthesis Engineer
1 week ago
Bangalore, India ACL Digital Full timeLooking for STA & Synthesis Engineer. Exp.-3.5+yrs. Job Location- Bangalore. Notice Period- Prefer Immediate joiner or less notice period. - Netlist and constraint sign in checks and validation. - Responsible to complete synthesis till final-opt with DFT insertion - Experience with sign-off Static Timing Analysis, Logic equivalency checks, and Static Low...
-
Bangalore, Bengaluru, Hyderabad, India Newsoft Consultants Full time ₹ 12,00,000 - ₹ 36,00,000 per year• SoC/Blocks Synthesis/STA methodology & flow for meeting PPA goals• Work with Backend team in realizing PPA goals during PnR & IP & SoC Design team in optimizing the design to meet PPA goals.• Feedback on design issues & solutions. Required Candidate profile• Exp in front end design implementation.• Design flows like Synthesis, Constraint Devel.,...
-
STA Synthesis Engineer
2 weeks ago
bangalore, India L&T Technology Services Full timeL&T Technology is looking to hire for STA Engineers. Job Location : Bangalore Detailed JD is below ::JD For STA Engineer-6+ ’ experience • Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs. • Can work closely with FE team for constraints development and constraints cleanup. • Work with...
-
Lead STA
2 weeks ago
bangalore, India Cadence System Design and Analysis Full timeBE /BtechEXp- 5- 12 YrsWork on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm.• Take ownership of one or more physical design blocks includes all of, floorplan, CTS, PNR, QRC, STA, PV & IR.• Contribute to design methodology, flow automation.• Innovate & implement Power, Performance and Area optimization...
-
STA Engineer
4 days ago
Bangalore, India ACL Digital Full timeRole: STA Engineer Experience: 3+ Years Location: Bangalore (Onsite) Notice Period: Immediate to 30 Days / Serving Notice Key Responsibilities: Perform Static Timing Analysis (STA) at block and full-chip levels across multiple design stages (synthesis, P&R, sign-off). Develop, validate, and maintain timing constraints (SDC files) for complex SoC and IP-level...
-
Lead STA
2 weeks ago
Bangalore, India Cadence System Design and Analysis Full timeBE /Btech EXp- 5- 12 Yrs Work on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm. • Take ownership of one or more physical design blocks includes all of, floorplan, CTS, PNR, QRC, STA, PV & IR. • Contribute to design methodology, flow automation. • Innovate & implement Power, Performance and Area...
-
Lead STA
1 week ago
bangalore district, India Cadence System Design and Analysis Full timeBE /Btech EXp- 5- 12 Yrs Work on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm. • Take ownership of one or more physical design blocks includes all of, floorplan, CTS, PNR, QRC, STA, PV & IR. • Contribute to design methodology, flow automation. • Innovate & implement Power, Performance and Area...
-
Sta Synthesis Sr Engineer/lead/staff
4 weeks ago
Bangalore, Karnataka, India Qualcomm Full timeCompany Qualcomm India Private Limited Job Area Engineering Group Engineering Group Hardware Engineering General Summary As a leading technology innovator Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drives digital transformation to help create a smarter connected future for all As a Qualcomm Hardware Engineer...