Sta(static timing analysis) engineer
5 days ago
Experience : 5+years Location : Bangalore Job Description: As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or So C designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process corners. Key Responsibilities: Own full-chip and block-level timing closure across RTL, synthesis, and physical implementation stages. Develop and validate timing constraints (SDC) for blocks, partitions, and full-chip designs. Perform timing analysis using industry-standard tools (e.g., Prime Time, Tempus). Collaborate with design and architecture teams to define timing requirements and resolve timing violations. Analyze timing scenarios, margins, and corner cases. Integrate third-party IPs and derive timing signoff requirements. Optimize timing paths and reduce signoff corners by merging modes. Automate STA flows using scripting languages. Support test mode timing closure (e.g., scan shift, scan capture, BIST). Primary Skills: Static Timing Analysis (STA): Deep expertise in STA tools like Synopsys Prime Time, Cadence Tempus. Timing Constraints Development: Proficient in writing and validating SDC constraints. Scripting Languages: Strong skills in TCL, Perl, Python for automation. ASIC/So C Design Knowledge: Understanding of synthesis, physical design, and backend flows. Corner and Mode Analysis: Experience with timing corners, process variations, and signal integrity. Constraint Debugging: Familiarity with tools like Synopsys GCA (Galaxy Constraint Analyzer). Secondary Skills: Tool Proficiency: Experience with tools like Genus, Timevision, Fishtail, Tweaker. Low-Power Design: Knowledge of UPF, multi-voltage domains, and power gating. Custom IP Integration: Handling of PLLs, Ser Des, ADC/DAC, GPIO, HSIO. Communication & Collaboration: Strong interpersonal skills for cross-functional teamwork. Mentorship: Ability to guide and mentor junior engineers. Process Node Experience: Familiarity with advanced nodes (3nm, 5nm, 7nm, Fin FET).
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Static Timing Analysis
2 days ago
bangalore, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) Engineer Job DescriptionJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with...
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Static Timing Analysis
2 days ago
bangalore district, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) Engineer Job Description Job Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating...
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STA(Static Timing Analysis) Engineer
2 weeks ago
Bangalore, India Capgemini Engineering Full timeExperience : 5+years Location : Bangalore Job Description: As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages...
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STA(Static Timing Analysis) Engineer
1 week ago
bangalore, India Capgemini Engineering Full timeExperience: 5+yearsLocation: BangaloreJob Description:As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process...
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STA(Static Timing Analysis) Engineer
2 days ago
bangalore district, India Capgemini Engineering Full timeExperience : 5+years Location : Bangalore Job Description: As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and...
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STA Engineer
2 weeks ago
Bangalore, India ACL Digital Full timeLooking for STA Engineer. Exp.-5+yrs. Job Location- Bangalore/Hyderabad/remote. Notice Period- Prefer Immediate joiner or less notice period. Netlist and constraint sign in checks and validation. Prime time constraint generation/development at Top level, full chip level and clean up. Multimode multi corner timing knowledge and timing closure at...
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Senior physical design engineer
3 days ago
Bangalore, India L&T Technology Services Full timeLTTS is hiring for PD/STA Engineers with 7-10 years of experience. Job Location : Bangalore Below is the job description... The PD/STA Engineer will be responsible for pre-design and static timing analysis tasks to ensure efficient silicon bring-up and product success. Day-to-day tasks include collaborating with design teams, performing timing analysis,...
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Senior Physical Design Engineer
1 week ago
bangalore, India L&T Technology Services Full timeLTTS is hiring for PD/STA Engineers with 7-10 years of experience.Job Location : BangaloreBelow is the job description...The PD/STA Engineer will be responsible for pre-design and static timing analysis tasks to ensure efficient silicon bring-up and product success. Day-to-day tasks include collaborating with design teams, performing timing analysis, and...
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Senior/staff sta engineer
5 days ago
Bangalore, India Tenstorrent Full timeTenstorrent is looking for a skilled and detail-oriented Static Timing Analysis (STA) Engineer to help us deliver first-pass silicon success for our cutting-edge AI and RISC-V So Cs. Engineers with a strong foundation in Static Timing Analysis (STA) and timing constraints. In this role, you’ll lead timing closure efforts across block and full-chip...
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Senior/lead sta engineer
5 days ago
Bangalore, India ACL Digital Full timeWe’re Hiring: STA Engineer | 5–10 Years Experience | Bangalore & Hyderabad Company: ACL Digital Company Location: Bangalore & Hyderabad Experience: 5 to 15 Years Job Type: Full-Time ACL Digital is looking for Senior Static Timing Analysis (STA) Engineers with solid experience in timing closure of advanced So C designs. If you’re an STA...
