Memory Layout Engineer

Experience Level 3 to 8 Years ( Mid-Level Role)Responsibilities:As Memory Layout Engineer, we will work on developing memory compilers layouts and memory Fast Cache instances layouts for our next generation Cores achieving outstanding PPA.Required Skills and Experience :We Prefer graduate or postgraduate from a University or Engineering School, in Electronic...

Job Title: Memory Layout EngineerExperience: 3+yrsLocation: BangaloreJob Type: Full-timeIndustry: Semiconductors / VLSI / Memory DesignJob Summary:We are looking for a Memory Layout Engineer with strong expertise in physical layout design of memory components such as SRAM, ROM, Register Files, or custom memory IPs. The candidate will be responsible for...

Job Title: Memory Design EngineerExperience Required: 2+ YearsLocation: BangaloreJob Type: Full-timeIndustry: Semiconductors / VLSI / Memory IPJob Summary:We are seeking a skilled Memory Design Engineer to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and validating high-performance and low-power...

Job Title: Lead Memory Design EngineerExperience: 6+ YearsLocation: BangaloreEmployment Type: Full-timeIndustry: Semiconductors / VLSI / Memory IP / SoCJob Summary:We are looking for an experienced and highly motivated Lead Memory Design Engineer to drive the architecture, design, and development of advanced memory IPs such as SRAMs, ROMs, CAMs, and Register...

Tata Electronics Private Limited (TEPL) is a greenfield venture of the Tata Group with expertise in manufacturing precision components.Tata Electronics (a wholly owned subsidiary of Tata Sons Pvt. Ltd.) is building India’s first AI-enabled state-of-the-art Semiconductor Foundry. This facility will produce chips for applications such as power management IC,...

ACL Digital is looking for an Experienced Layout EngineerMinumum 4+ years of Experience for Bangalore LocationGood to have ESD BlocksMust have Lower nodes from TSMCAMS/IO Memory - LayoutInterested share/refer karthick.v@acldigital.comBachelor's or Master's Degree with 4 - 12 years of Analog Layout experienceDemonstrated leadership experience of at least 3...

Position: Senior Memory Design Lead Engineer Location: BangaloreResponsibilities: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA. Required Skills and Experience : Understanding of computer architecture and concepts. Basic understanding of CMOS...

Analog Layout Engineer (3-7 Yrs Exp) Summary This position is for an Analog Layout Engineer role who should have the below required knowledge and skills - Should have very good understanding of semiconductor / Analog Layout & Physical verification basics. Good hands-on Block level scratch Layout work, floorplan, placement, routing Hands on in 28nm/22nm/...

Job Title: IO Layout EngineerExperience: 3+ YearsLocation: BangaloreEmployment Type: Full-timeIndustry: Semiconductors / ASIC / VLSI / IO & ESD DesignJob Summary:We are looking for a highly motivated and experienced IO Layout Engineer to join our custom layout team. The candidate will be responsible for full-custom layout of IO cells, ESD protection...

About the jobJob Title:Analog Layout EngineerJob Description:We are seeking a skilled and motivated Analog Layout Engineer to join our team. The ideal candidate will independently handle block-level and chip-level analog layout design while coordinating effectively with circuit designers and project leads. This is an exciting opportunity for individuals with...