Lead Memory Design Engineer
24 hours ago
Job Title: Lead Memory Design EngineerExperience: 6+ YearsLocation: BangaloreEmployment Type: Full-timeIndustry: Semiconductors / VLSI / Memory IP / SoCJob Summary:We are looking for an experienced and highly motivated Lead Memory Design Engineer to drive the architecture, design, and development of advanced memory IPs such as SRAMs, ROMs, CAMs, and Register Files. The role involves leading a team of designers, interacting with cross-functional groups, and delivering high-performance, low-power, and silicon-proven memory solutions at advanced technology nodes.Key Responsibilities:- Define architecture and design specifications for custom memory IPs or memory compilers. - Design and optimize circuits such as: - Memory cell arrays, sense amplifiers, precharge, write drivers, decoders, control logic - Lead the schematic-level design and simulation (pre-layout and post-layout) for performance, power, and robustness. - Collaborate with layout, verification, and technology teams to ensure full-cycle delivery. - Guide post-layout activities including parasitic extraction, IR/EM analysis, and corner validation. - Ensure designs meet requirements for DFM, yield, reliability, and aging. - Contribute to methodology and flow development for memory design and characterization. - Support silicon bring-up and correlation with pre-silicon simulation. - Provide technical leadership and mentorship to junior engineers. - Drive design reviews and coordinate with program managers for delivery timelines.Required Skills and Experience:- B.E/B.Tech or M.E/M.Tech in Electronics, Electrical, or VLSI Engineering. - 8+ years of experience in full-custom memory design (SRAM, ROM, CAM, Register Files). - Solid understanding of CMOS analog/digital circuit design principles. - Expertise in circuit simulation tools: Spectre, HSPICE, FastSPICE (XA, FineSim, etc.). - Experience with advanced nodes (28nm, 16nm, 7nm, 5nm, FinFET). - Hands-on experience with variation analysis (Monte Carlo, PVT), IR drop, and EM checks. - Familiarity with memory characterization, yield analysis, and silicon debug. - Strong analytical, communication, and leadership skills.Preferred Qualifications:- Experience in memory compiler design and automation. - Knowledge of low-power memory design techniques (multi-Vt, multi-Vdd, power gating). - Experience with ECC, redundancy, and repair strategies. - Familiarity with ISO 26262/Safety compliance (for automotive memory IPs). - Scripting knowledge (Python, Perl, Tcl) for automation of design and simulation flows.Interested can share Cv to Sharmila.b@acldigital.com
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Senior Memory Design Lead Engineer
23 hours ago
New Delhi, India ACL Digital Full timePosition: Senior Memory Design Lead Engineer Location: BangaloreResponsibilities: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA. Required Skills and Experience : Understanding of computer architecture and concepts. Basic understanding of CMOS...
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Memory Design Engineers
23 hours ago
New Delhi, India ACL Digital Full timeJob Title: Memory Design EngineerExperience Required: 2+ YearsLocation: BangaloreJob Type: Full-timeIndustry: Semiconductors / VLSI / Memory IPJob Summary:We are seeking a skilled Memory Design Engineer to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and validating high-performance and low-power...
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Memory Layout Engineer
22 hours ago
New Delhi, India ACL Digital Full timeJob Title: Memory Layout EngineerExperience: 3+yrsLocation: BangaloreJob Type: Full-timeIndustry: Semiconductors / VLSI / Memory DesignJob Summary:We are looking for a Memory Layout Engineer with strong expertise in physical layout design of memory components such as SRAM, ROM, Register Files, or custom memory IPs. The candidate will be responsible for...
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Memory Layout Engineer
7 days ago
New Delhi, India Exiger Technologies Full timeExperience Level 3 to 8 Years ( Mid-Level Role)Responsibilities: As Memory Layout Engineer, we will work on developing memory compilers layouts and memory Fast Cache instances layouts for our next generation Cores achieving outstanding PPA.Required Skills and Experience :We Prefer graduate or postgraduate from a University or Engineering School, in...
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Memory Layout Engineer
24 hours ago
New Delhi, India Exiger Technologies Full timeExperience Level 3 to 8 Years ( Mid-Level Role)Responsibilities:As Memory Layout Engineer, we will work on developing memory compilers layouts and memory Fast Cache instances layouts for our next generation Cores achieving outstanding PPA.Required Skills and Experience :We Prefer graduate or postgraduate from a University or Engineering School, in Electronic...
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ASIC SOC RTL Design Lead
7 days ago
New Delhi, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads ..!Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled...
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ASIC SOC RTL Design Lead
23 hours ago
New Delhi, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....!We are HiringASIC SOCRTL Design Engineer/Leads.Job Title:ASIC SOC RTL Design Engineer/Leads ..! Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US.Job Description: Eximietas Design is seeking an experienced and highly...
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eNVM Bitcell Layout Design Engineer
23 hours ago
New Delhi, India Tata Electronics Full timeTata Electronics Private Limited (TEPL) is a greenfield venture of the Tata Group with expertise in manufacturing precision components.Tata Electronics (a wholly owned subsidiary of Tata Sons Pvt. Ltd.) is building India’s first AI-enabled state-of-the-art Semiconductor Foundry. This facility will produce chips for applications such as power management IC,...
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Senior DFT Engineer
22 hours ago
New Delhi, India Eximietas Design Full timeHi All, Greetings from Eximietas...!Position: Senior DFT Engineers/Leads/Architects. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US.We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge and experience in...
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Lead RTL Design Engineer
7 days ago
New Delhi, India ACL Digital Full timeLead RTL Design EngineersExperience Level:10+ years of RTL design and development Job Description: Silicon Design Engineer Location: Hyderabad and BangaloreBasic Job Deliverable: Silicon Design Engineer (RTL Design and Development) o Responsible for RTL design and development o Responsible for generating documents, such as requirements specification, design,...
