
NOC/IP-Design Verification Lead Engineer
14 hours ago
Exp: 8+ Years
Location: Bangalore
JD:
Key Responsibilities:
· Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.
· Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.
· Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and UCIe connected via NoC.
· Model and validate credit-based flow control, packet routing, QoS, and virtual channel behavior.
· Perform assertion-based verification (SVA/DVL) for protocol compliance and corner cases.
· Debug complex interactions at simulation or emulation level, including deadlocks, congestion, or ordering violations.
· Work closely with architects and RTL teams to align verification coverage and performance metrics.
· Perform coverage closure (code + functional) and ensure complete verification sign-off.
Required Skills:
· Strong experience with SystemVerilog, UVM, and object-oriented testbench development.
· In-depth knowledge of NoC protocols (AXI4, CHI, TileLink, or proprietary NoC).
· Verification experience with coherent interconnects, cacheable traffic, and memory subsystem validation.
· Familiarity with Synopsys, Cadence, or Siemens verification tools (VCS/Xcelium/Questa).
· Familiarity with formal verification, assertions (SVA/PSL), and coverage metrics.
· Ability to debug low-level issues using waveform analysis, scoreboards, and transactors.
· Familiarity with multi-core CPU, DSP, or GPU interconnect systems is a plus.
-
NOC/IP-Design Verification Lead Engineer
22 hours ago
Bangalore, India ACL Digital Full timeExp: 8+ Years Location: Bangalore JD: Key Responsibilities: · Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics. · Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic. · Integrate and verify IPs like AXI4, CHI-B/C/E,...
-
NOC/IP-Design Verification Lead Engineer
25 minutes ago
bangalore, India ACL Digital Full timeExp: 8+ YearsLocation: BangaloreJD:Key Responsibilities:· Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.· Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.· Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and UCIe...
-
NoC Verification Engineer
22 hours ago
Bangalore, India ACL Digital Full timeNoC Verification Engineer Experience : 7 to 14 Years Key Responsibilities: Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics. Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic. Integrate and verify IPs like...
-
IP Verification Engineer
22 hours ago
Bangalore, India ACL Digital Full timeJob Title :IP Verification Engineer – UVM verification Exp Level:4+ yrs Location:Bangalore/Hyderabad Job Description:System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network...
-
Verification Lead Design Engineer
1 hour ago
bangalore, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...
-
SoC Verification Engineer
22 hours ago
Bangalore, India ScaleFlux Full timeVerification Lead Engineer Join the India team of most cutting-edge and well-funded storage startup in Silicon Valley as the Lead Verification Engineer taking on IP and SoC level verification challenges. As a Verification Lead with a focus on verification of Multi-core, complex, high performance ASIC, you will work to understand the internal...
-
Design Verification Lead
14 hours ago
Bangalore Urban, India Mirafra Technologies Full timeMirafra Technologies hiring for a Design Verification Engineer with min 7+Yrs Experience.Location-Bangalore/HyderabadQualification-BE/B Tech/M Tech1. Must Have: SoC or IP Verification2. Experience Languages: System Verilog3. Methodologies: OVM/UVM/VMM4. Protocols: PCIE/DDR/Ethernet/UFS/CHI5. Processor/ARM Based SoC Verification experience6. Candidate must...
-
SoC Verification Engineer
4 hours ago
bangalore, India ScaleFlux Full timeVerification Lead EngineerJoin the India team of most cutting-edge and well-funded storage startup in Silicon Valley as the Lead Verification Engineer taking on IP and SoC level verification challenges.As a Verification Lead with a focus on verification of Multi-core, complex, high performance ASIC, you will work to understand the internal requirements and...
-
Verification Lead
5 days ago
Bangalore Urban district, India Tessolve Full timeob Title: Senior Design Verification Engineer – IP/SoC/Processor/GLS Experience: 5 to 15 Years Location: (Insert Location – e.g., Bangalore / Hyderabad / Chennai / Noida ) Company: Tessolve Semiconductor Job Type: Full-Time | Permanent Domain: Semiconductor – Design Verification Job Summary: Tessolve is hiring experienced Design Verification...
-
Verification Lead
14 hours ago
Bangalore Urban district, India Tessolve Full timeob Title: Senior Design Verification Engineer – IP/SoC/Processor/GLSExperience: 5 to 15 YearsLocation: [Insert Location – e.g., Bangalore / Hyderabad / Chennai / Noida ]Company: Tessolve SemiconductorJob Type: Full-Time | PermanentDomain: Semiconductor – Design VerificationJob Summary:Tessolve is hiring experienced Design Verification Engineers with a...