NoC Verification Engineer

17 hours ago

bangalore district, India ACL Digital Full time

NoC Verification Engineer Experience : 7 to 14 Years Key Responsibilities: 🔸Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics. 🔸Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic. 🔸Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and UCIe connected via NoC. 🔸Model and validate credit-based flow control, packet routing, QoS, and virtual channel behavior. 🔸Perform assertion-based verification (SVA/DVL) for protocol compliance and corner cases. 🔸Debug complex interactions at simulation or emulation level, including deadlocks, congestion, or ordering violations. 🔸Work closely with architects and RTL teams to align verification coverage and performance metrics. 🔸Perform coverage closure (code + functional) and ensure complete verification sign-off. Required Skills: 🔸Strong experience with SystemVerilog, UVM, and object-oriented testbench development. 🔸In-depth knowledge of NoC protocols (AXI4, CHI, TileLink, or proprietary NoC). 🔸Verification experience with coherent interconnects, cacheable traffic, and memory subsystem validation. 🔸Familiarity with Synopsys, Cadence, or Siemens verification tools (VCS/Xcelium/Questa). 🔸Familiarity with formal verification, assertions (SVA/PSL), and coverage metrics. 🔸Ability to debug low-level issues using waveform analysis, scoreboards, and transactors. 🔸Familiarity with multi-core CPU, DSP, or GPU interconnect systems is a plus. Location: Bangalore About Company: ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.

  • NoC Verification Engineer

    2 weeks ago

    bangalore, India ACL Digital Full time

    NoC Verification EngineerExperience: 7 to 14 YearsKey Responsibilities:🔸Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.🔸Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.🔸Integrate and verify IPs like AXI4, CHI-B/C/E,...

  • NOC/IP-Design Verification Lead Engineer

    2 weeks ago

    Bangalore, India ACL Digital Full time

    Exp: 8+ Years Location: Bangalore JD: Key Responsibilities: · Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics. · Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic. · Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and...

  • NOC/IP-Design Verification Lead Engineer

    2 weeks ago

    bangalore, India ACL Digital Full time

    Exp: 8+ YearsLocation: BangaloreJD:Key Responsibilities:· Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.· Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.· Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and UCIe...

  • NOC/IP-Design Verification Lead Engineer

    4 days ago

    Bangalore, India ACL Digital Full time

    Exp: 8+ Years Location: Bangalore JD: Key Responsibilities: · Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics. · Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic. · Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and...

  • Verification Lead

    17 hours ago

    bangalore district, India ACL Digital Full time

    Role: Lead Verification Engineer Experience : 8+ years Location : Bangalore Responsibilities: Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics. Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic. Integrate and verify IPs like...

  • NOC/IP-Design Verification Lead Engineer

    2 weeks ago

    Bangalore Urban, India ACL Digital Full time

    Exp: 8+ Years Location: Bangalore JD: Key Responsibilities: · Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics. · Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic. · Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and...

  • NOC/IP-Design Verification Lead Engineer

    18 hours ago

    Bangalore Urban, India ACL Digital Full time

    Exp: 8+ YearsLocation: BangaloreJD:Key Responsibilities:· Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.· Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.· Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and UCIe...

  • IP Verification Engineer

    2 weeks ago

    bangalore district, India ACL Digital Full time

    Job Title :IP Verification Engineer – UVM verification Exp Level:4+ yrs Location:Bangalore/Hyderabad Job Description:System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip...

  • NOC/IP-Design Verification Lead Engineer

    6 hours ago

    Bangalore Urban, Karnataka, India, IN ACL Digital Full time

    Exp: 8+ YearsLocation: BangaloreJD:Key Responsibilities:· Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.· Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.· Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and UCIe...

  • SoC Verification Engineer

    4 days ago

    bangalore district, India ScaleFlux Full time

    Verification Lead Engineer Join the India team of most cutting-edge and well-funded storage startup in Silicon Valley as the Lead Verification Engineer taking on IP and SoC level verification challenges. As a Verification Lead with a focus on verification of Multi-core, complex, high performance ASIC, you will work to understand the internal requirements and...