FPGA Design with RTL Coding

Exp Level : More than 5+Years will be consideredCompany DescriptionNG-RAN IIT Hyderabad is at the forefront of global wireless innovation, prominently contributing to the development of 5G technologies. The institute's team, alongside academic and industry partners, submitted more than 400 technical papers to 3GPP workgroups from 2017 to 2021, resulting in...

Position: ASIC RTL Design EngineerLocation: Bangalore / HyderabadExperience: 6+ yearsDesign and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks.Create micro-architecture specs and ensure designs meet performance, power, and area targets.Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...

Position: ASIC RTL Design Engineer Location: Bangalore / Hyderabad Experience: 6+ yearsDesign and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks.Create micro-architecture specs and ensure designs meet performance, power, and area targets.Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...

We work on leading technologies in Signal Processing solving problems in Defense and Aerospace fields. Our solutions range from tactical radios to radars, and from research to mission critical applications. Our Vision is to be a global business organization solving problems using Signal Processing Systems, making lives better and safer.Job Title:RTL Design...

About UsWe are a dynamic team of young engineers, domain experts, and seasoned sales professionals dedicated to providing comprehensive turnkey solutions for complex challenges in Signal Processing. Our expertise spans the cutting-edge technologies in Signal Processing, addressing critical needs in the Defence and Aerospace sectors. Our offerings encompass a...

Job Requirements Job Title: RTL Tech Lead We are currently seeking a highly skilled and experienced RTL Tech Lead to join our team. As the RTL Tech Lead, you will be responsible for leading the development and implementation of RTL designs for our projects. You will work closely with the engineering team to ensure the successful delivery of high-quality...

FPGALocation: HyderabadJob Description:Responsibilities include packing RTL files into IP using AMD packaging methodologyExcellent TCL and PERL/Python concepts and experience in Verilog / System Verilog design and verification.Working knowledge of UNIX environment desired.Job Requirement:Expertise with FPGA architecture and Xilinx-AMD, VivadoDebug skills...

Job Requirements he RTL Design Engineer is responsible for designing and implementing digital circuits using Hardware Description Languages (HDL) such as Verilog or VHDL.They work on creating logic at the Register Transfer Level (RTL) and collaborate with verification, synthesis, and physical design teams.Key Responsibilities:Understand and analyze design...

About UsWe are a dynamic team of young engineers, domain experts, and seasoned sales professionals dedicated to providing comprehensive turnkey solutions for complex challenges in Signal Processing. Our expertise spans the cutting-edge technologies in Signal Processing, addressing critical needs in the Defence and Aerospace sectors. Our offerings encompass a...

The requirement is immediate so please only apply if you can join immediately or in about 1 month.Please fill this form to take things forward:FPGA Developer Requirements:1) Should be comfortable with Vivado2) Coding language: VHDL/Verilog/SystemVerilog3) Should have developed AXI peripherals for Zynq and other Xilinx FPGAs. Should have a knowledge of the PS...