Senior ASIC RTL Designer
8 hours ago
Position: ASIC RTL Design Engineer
Location: Bangalore / Hyderabad
Experience: 6+ years
- Design and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks.
- Create micro-architecture specs and ensure designs meet performance, power, and area targets.
- Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT readiness.
- Collaborate with verification teams for test planning, debugging, and coverage closure.
- Integrate IPs into top-level SoC and resolve timing and functionality issues.
- Support emulation, FPGA prototyping, and silicon bring-up activities with cross-functional teams.
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ASIC RTL Design Engineer
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Staff / Senior Staff ASIC Design Engineer
3 days ago
Hyderabad, Telangana, India Cyient Full time ₹ 8,00,000 - ₹ 20,00,000 per yearJob Title: Staff / Senior Staff ASIC Design EngineerCompany: Cyient SemiconductorLocation: Hyderabad, IndiaExperience Required: 6 to 10 yearsEmployment Type: Full-Time / PermanentAbout Cyient Semiconductor:Cyient Semiconductor, a division of Cyient Ltd., enables global semiconductor innovation through comprehensive ASIC, SoC, and Mixed-Signal design...
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Senior ASIC Design Verification Engineer
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ASIC RTL Engineer
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ASIC Physical Design Engineer
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Junior ASIC Engineer
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Asic design Sr .Engineer
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ASIC/SOC Front End Design Engineer
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Senior Staff ASIC Design Engineer
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Hyderabad, Telangana, India Axiado Full time ₹ 12,00,000 - ₹ 36,00,000 per yearCompany Description Axiado is an AI-enhanced security processor company redefining the control and management of every digital system. The company was founded in 2017, and currently has 100+ employees. At Axiado, developing great technology takes more than talent: it takes amazing people who understand collaboration, respect each other, and go the extra mile...