Senior/Lead STA engineer

We are seeking an exceptional STA Engineer to take a key role in our semiconductor designteam. As STA Engineer you will get opportunity to work with talented and passionate STAengineers and create designs that push the envelope on performance, energy efficiency andscalability. you will lead the STA for cutting-edge high speed and complex large ASIC. Youwill...

Job Title:STA EngineerLocation:Banglaore/HyderabadEmployment Type:Full-timeIndustry:Semiconductors / VLSI / ASIC DesignJob Summary:We are looking for a skilled and motivatedSTA Engineerto join our backend implementation team. The engineer will be responsible for RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, targeting performance,...

Job DescriptionKEY RESPONSIBILITIES:Responsible for Multi Voltage domain STA environment setup, execution and timing closureDrive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checksEnsuring timing correlation between PnR STA and timely feedbacks to PD teamGenerating block level HS session and using...

Job DescriptionKey Responsibilities:Timing Analysis & ClosurePerform setup, hold, and skew analysis across Full-Chip, Sub-system, and IP levels.Achieve timing closure by resolving violations and optimizing paths.Constraint DevelopmentDefine and validate timing constraints (clocks, I/O delays, false/multi-cycle paths).Integrate constraints from multiple IPs...

Job DescriptionSTA Engineer (5-10 Years)Key ResponsibilitiesResponsible for Multi Voltage domain STA environment setup, execution and timing closureDrive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checksEnsuring timing correlation between PnR STA and timely feedbacks to PD teamGenerating block...

Role & responsibilitiesDevelop, validate, and maintain STA constraints (SDC) for multiple design modes and corners (functional, test, scan, BIST, low power, etc.).Own DFT timing constraints (scan shift, capture, at-speed test, boundary scan, MBIST, LBIST, JTAG).Collaborate with DFT and Physical Design teams to ensure test structures meet timing closure...

Static Timing Analysis (STA) EngineerJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...

WHAT YOU DO AT AMD CHANGES EVERYTHINGAt AMD, our mission is to build great products that accelerate next-generation computing experiences – from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create...

STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. Timing analysis, validation and debug across multiple PVT conditions using Tempus. Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Hands-on experience with STA tools - Tempus In-depth knowledge cross-talk noise, Signal Integrity,...

Job Description:We are looking for a Lead STA (Static Timing Analysis) Engineer to join our semiconductor design team. The ideal candidate will have extensive experience in ASIC/SoC timing analysis, closure, and signoff, along with deep knowledge of industry-standard tools like PrimeTime or Tempus.You will be responsible for driving timing closure, ensuring...