Custom Layout Designer

This is Jr position., If you are meeting with below criteria means pls share your resume to with below details..Over all experience;Relevant experience;CCTC;ECTC;Current location;Will you able to attend final round in F2F at Bangalore;Location; BangaloreRole; Custom Standard Cell Design EngineerFinal round must be F2F.Job DescriptionYou will be responsible...

Job Title: Senior Layout Design Engineer (Analog/RF)Budget: ₹10–15 LPALocation: BangaloreExperience: 8–10+ yearsRole Overview:We are hiring an experienced Senior Layout Engineer specializing in Analog/RF to take ownership of IC mask layout design, physical verification, and team leadership. You will work closely with circuit designers and CAD engineers...

Memory LayoutLocation: BangaloreJob Description:3-8 years of experience in Memory/Custom Layout design.Memory Leafcell layout library design from scratch including top level integration.Good knowledge on different types of memory architectures.Good knowledge in optimized layout design for better performance.Sound knowledge & hands on experience in Finfet...

Memory Layout Lead – Best-in-Class Semiconductor Memory IPsAs a Memory Layout Lead, you will drive the physical design and delivery of high-performance, low-power, and high-density semiconductor memory IPs (SRAM, ROM, register files, CAMs, and more). You will own the complete layout strategy—from bitcell integration to periphery circuits—ensuring...

Job Title : Senior Analog Layout Engineer VLSI Location : Bangalore, India Experience : 6 to 12 Years Employment Type : Full-time / Permanent About the Role : We are looking for an experienced Analog Layout Engineer with a strong background in custom and analog/mixed-signal layout design for advanced process nodes. The candidate will be responsible...

Job Title:Memory Layout EngineerExperience:3+yrsLocation:BangaloreJob Type:Full-timeIndustry:Semiconductors / VLSI / Memory DesignJob Summary:We are looking for aMemory Layout Engineerwith strong expertise in physical layout design of memory components such as SRAM, ROM, Register Files, or custom memory IPs. The candidate will be responsible for delivering...

Key Responsibilities:Perform custom layout design of high-performance and low-power memory blocks (SRAM, ROM, Register Files, CAM, etc.).Work on floorplanning, transistor-level layout, device matching, and parasitic optimization.Ensure DRC/LVS clean layouts with adherence to foundry design rules.Collaborate with circuit design teams to achieve optimal PPA...

Experience in Custom Layout design using tools such as Cadence Virtuoso, Synopsys Custom Compiler, or Mentor Pyxis. Knowledge of semiconductor devices, transistor-level design, & layout techniques for high-density memory cells. Calibre, Pegasus, ICV

Years: 3yrs to 8yrsLocation: BangaloreJD:3-8 years of experience in Memory/Custom Layout design.Memory Leafcell layout library design from scratch including top level integration.Good knowledge on different types of memory architectures.Good knowledge in optimized layout design for better performance.Sound knowledge & hands on experience in Finfet...

Required Skills & Tools:Strong experience in Custom Layout design using tools such as Cadence Virtuoso, Synopsys Custom Compiler, or Mentor Pyxis.Good knowledge of semiconductor devices, transistor-level design, and layout techniques for high-density memory cells.Familiarity with DRC/LVS tools (Calibre, Pegasus, ICV).Understanding of technology nodes (e.g.,...