Memory layout design lead

Job Description: 3-8 years of experience in Memory/Custom Layout design.Memory Leaf cell layout library design from scratch including top level integration.Good knowledge on different types of memory architectures.Good knowledge in optimized layout design for better performance.Sound knowledge & hands on experience in Finfet technology, layout design and DRC...

Job Title: Memory Layout Engineer Experience: 3+yrs Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory Design Job Summary: We are looking for a Memory Layout Engineer with strong expertise in physical layout design of memory components such as SRAM, ROM, Register Files, or custom memory IPs. The candidate will be...

We are seeking a highly skilled and experienced Memory Layout Engineer to join our team. The ideal candidate will have hands-on expertise in designing and integrating layouts for advanced memory blocks across leading-edge process technologies. You will play a critical role in developing and verifying memory compilers with a strong focus on ultra-deep...

Experience in layout design of leaf cell level and top level (integration) of custom memories example SRAM and Register Files Work closely with circuit designers to understand schematics and translate them into optimized layouts. Good understanding of Floor-planning, placement, matching, routing, parasitics and layout constraints. Good understanding and...

Experience in layout design of leaf cell level and top level (integration) of custom memories example SRAM and Register FilesWork closely with circuit designers to understand schematics and translate them into optimized layouts.Good understanding of Floor-planning, placement, matching, routing, parasitics and layout constraints.Good understanding and...

Experience Level 3 to 8 Years ( Mid-Level Role)Responsibilities:As Memory Layout Engineer, we will work on developing memory compilers layouts and memory Fast Cache instances layouts for our next generation Cores achieving outstanding PPA.Required Skills and Experience :We Prefer graduate or postgraduate from a University or Engineering School, in Electronic...

Key Responsibilities:Perform custom layout design of high-performance and low-power memory blocks (SRAM, ROM, Register Files, CAM, etc.).Work on floorplanning, transistor-level layout, device matching, and parasitic optimization.Ensure DRC/LVS clean layouts with adherence to foundry design rules.Collaborate with circuit design teams to achieve optimal PPA...

Experience Level 3 to 8 Years ( Mid-Level Role) Responsibilities: As Memory Layout Engineer, we will work on developing memory compilers layouts and memory Fast Cache instances layouts for our next generation Cores achieving outstanding PPA. Required Skills and Experience : We Prefer graduate or postgraduate from a University or Engineering...

Memory LayoutRole: Layout Design of SRAM/CAM/RF compiler memories in 5/3FF technology.Responsibilities: Development of key building blocks of memory architecture such as Row Decoder, IO, Control. Skilled in pitched layout concepts, floor planning for Placement, Power and Global Routing. Compiler level integration, verification of Compiler/Custom...

Job Description: 3-8 years of experience in Memory/Custom Layout design.Location: Bangalore Memory Leafcell layout library design from scratch including top level integration. Good knowledge on different types of memory architectures. Good knowledge in optimized layout design for better performance. Sound knowledge & hands on experience in Finfet technology,...