Memory Layout Engineers-Bangalore

Hi,We are looking for aMemory Layout Engineerfor one of our clients.Experience:4 to 8 YearsJob Description:We are seeking experiencedMemory Layout Engineerswith hands-on expertise in3nm or below process nodes. The ideal candidate should have a strong background incustom layout design and verificationfor advanced semiconductor technologies.Location:Electronic...

Memory LayoutLocation: BangaloreJob Description:3-8 years of experience in Memory/Custom Layout design.Memory Leafcell layout library design from scratch including top level integration.Good knowledge on different types of memory architectures.Good knowledge in optimized layout design for better performance.Sound knowledge & hands on experience in Finfet...

Analog mixed signal layout/Memory Layout engineers with 4-10yrs of experiance in lower technology nodes for Germany/Bangalore and Hyderabad locations.

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world's most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and...

Company DescriptionIInSemi is growing expeditiously and with a team of 1000+ technology specialists, we bring in competitive advantage, agile mindset, and innovation to address technological challenges and transform businesses.With our expertise in electronic design, platform design, automation, embedded and software technologies, we Strategize, Innovate,...

We are seeking experienced Memory Layout Engineers with hands-on expertise in 3nm or below process nodes. The ideal candidate should have a strong background in custom layout design and verification for advanced semiconductor technologies.

Key Responsibilities:Perform custom layout design of high-performance and low-power memory blocks (SRAM, ROM, Register Files, CAM, etc.).Work on floorplanning, transistor-level layout, device matching, and parasitic optimization.Ensure DRC/LVS clean layouts with adherence to foundry design rules.Collaborate with circuit design teams to achieve optimal PPA...

Looking for an experienced Memory Layout Engineer with proven hands-on expertise in advanced technology nodes (3nm or below). Candidate will be responsible for the physical layout design and verification of memory circuits (SRAM, ROM, DRAM)

Company:Qualcomm India Private LimitedJob Area:Engineering Services Group, Engineering Services Group > Layout EngineerGeneral Summary:Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic...

Company:Qualcomm India Private LimitedJob Area:Engineering Services Group, Engineering Services Group > Layout EngineerGeneral Summary:Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic...