Senior Custom Memory Designer

6 days ago

Bengaluru, Karnataka, India beBeeMemory Full time ₹ 5,00,000 - ₹ 8,00,000

Job Title: Expert Memory Layout Engineer

General Job Summary

You will be part of a high-performance CPU team, collaborating with top engineering talent to deliver designs that push the limits of performance, energy efficiency, and scalability.

This role offers a dynamic and creative environment, with opportunities to impact next-generation products used around the world.

Key Responsibilities
  • Develop block or macro-level layouts and floorplans for high-performance custom memories
  • Apply industry best practices, work with cutting-edge technologies, and contribute to building world-class silicon products
Minimum Qualifications
  • Education & Experience: High school diploma or equivalent and 5+ years of relevant experience OR Bachelor's degree in Electrical Engineering or related field and 5+ years of relevant experience OR Master's degree in Electrical Engineering or related field and 3+ years of relevant experience
  • Technical Expertise:
  • Hands-on experience with custom SRAM layout Familiarity with industry-standard custom design tools and flows Experience with deep sub-micron technologies (e.g., FinFET/nanosheet processes at 5nm or below) Proficiency in layout design of library cells, datapaths, and memories Knowledge of Cadence Virtuoso and Calibre LVS/DRC tools Understanding of layout floorplanning and hierarchical assembly
  • Desirable Skills:
  • Understanding of device parasitics and reliability considerations in layout Familiarity with critical circuit layout styles Ability to write SKILL code for layout automation Knowledge of EMIR improvements in layout Strong communication skills to collaborate effectively across teams
Roles and Responsibilities
  • Design layout for custom memories and digital circuits based on schematics Interpret and apply design rule manuals for optimal layout compliance Manage the complete layout process, from floorplanning to physical verification Use verification tools to run LVS, DRC, ERC, and analyze results Execute layout fixes based on feedback from verification tools and circuit designers Work independently and deliver layout tasks with minimal supervision Provide realistic schedules and ensure timely completion of layout projects Contribute to strategic decisions and optimization related to memory layout

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