Principal Verification Strategist

4 days ago

Vizag, Andhra Pradesh, India beBeeDesign Full time ₹ 2,00,00,000 - ₹ 2,25,00,000
Senior Design Verification Lead Job Description

Our organization is seeking a skilled Senior Design Verification Lead to oversee SoC design verification efforts for complex projects. This individual will be responsible for ensuring the successful execution of verification plans.

  • We are looking for an experienced professional to develop and implement comprehensive verification strategies, including test plans, testbenches, and coverage analysis, for high-speed peripherals (e.g., I2C, SPI, UART, GPIO, QSPI) as well as high-speed protocols (e.g., PCIe, Ethernet, CXL, MIPI, DDR, HBM).
  • The ideal candidate will have experience conducting gate-level simulations and power-aware verification using tools like Xprop and UPF.
  • Collaboration with cross-functional teams, including architects, designers, and pre/post-silicon verification teams, is essential to ensure alignment and seamless integration of verification efforts.
  • Analysis and implementation of System Verilog assertions and functional coverage (code, toggle, functional) are required to ensure thorough verification of design functionality.
  • Providing mentorship and technical guidance to junior verification engineers is also an important aspect of this role.
  • Leading and managing a dynamic team of verification engineers, fostering a collaborative and innovative work environment, is crucial to our success.
  • Ensuring that all verification signoff criteria are met, with clear and comprehensive documentation, is a key responsibility of this position.
  • Strong dedication, work ethic, and commitment to meeting project goals and deadlines are essential qualities for this role.
  • Upholding quality standards and implementing best test practices, contributing to continuous improvements in verification methodologies, is also critical.
  • Experience working with verification tools from Synopsys and Cadence, including VCS and Xsim, is necessary.
  • Integrating third-party VIPs (Verification IP) from Synopsys and Cadence to enhance verification coverage is also an important aspect of this role.
Requirements
  • Highly skilled Senior Design Verification Lead
  • Experience developing and implementing comprehensive verification strategies
  • Proficiency in conducting gate-level simulations and power-aware verification
  • Collaboration skills with cross-functional teams
  • Ability to analyze and implement System Verilog assertions and functional coverage
  • Leadership and management skills for a dynamic team of verification engineers
  • Strong communication and interpersonal skills
  • Experience working with verification tools from Synopsys and Cadence
Benefits

Our organization offers a competitive salary and benefits package, including health insurance, retirement savings plan, and paid time off.

Others

As a Senior Design Verification Lead, you will have the opportunity to work on complex projects, collaborate with cross-functional teams, and contribute to the development of verification methodologies.

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