Senior Subsystem Verification Specialist

20 hours ago

Bengaluru, Karnataka, India beBeeVerification Full time ₹ 1,50,00,000 - ₹ 2,00,00,000

**Job Overview**

We are seeking a highly experienced Senior Subsystem Verification Specialist to join our team. The successful candidate will have a strong background in subsystem verification methodology and flows, with experience in test planning & testbench design/improvements and coverage closure.

Key Responsibilities:

  • Develop and implement comprehensive verification test plans for subsystem components and IP's.
  • Build testbenches from scratch for new subsystems, develop verification flows and test cases using System Verilog and UVM methodology.
  • Drive functional verification of RTL designs at sub system level or SoC Level including simulation, debugging and coverage closure, ensuring high-quality and robust designs.
  • Collaborate with design engineers to understand detailed design specifications and target corner cases and various configurations of subsystem levels.
  • Generate and analyze verification metrics to regularly track progress and ensure timely coverage closure.
  • Participate in design and verification reviews, test plan reviews, methodology reviews, providing technical expertise and insights.
  • Incorporate newer verification techniques and methodologies to improve verification efficiency and effectiveness.
  • Guide and mentor junior verification engineers and provide technical guidance.

Requirements & Qualifications:

  • Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related fields from an institute of repute.
  • Proficiency in verification languages and methodologies, such as SystemVerilog, UVM, and other industry-standard tools.
  • Experience with scripting languages (e.g., Python, Perl, Tcl) for automation and tool integration.
  • Excellent problem-solving skills and attention to detail.
  • Strong oral and written communication skills, with an ability to work as a team player in a fast-paced collaborative environment.
  • Track record of successfully participating in or leading verification of complex IP blocks, Subsystems or SoC Modules.
  • 3-15 years of experience in design verification, with a focus on Subsystem/SoC verification. Candidates with higher experience will be considered for senior or lead roles.

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