Senior Subsystem Verification Specialist

20 hours ago

Bengaluru, Karnataka, India beBeeVerification Full time ₹ 70,00,000 - ₹ 1,00,00,000
Sub System Verification Engineer/Lead

Verification Excellence: Join us to tackle verification challenges in next gen Smartphone, Compute and Automotive chips.

This role involves developing and implementing comprehensive verification test plans for subsystems components and IP's.

  • We are looking for someone who can build testbenches from scratch for new Sub systems, develop verification flows and test cases using System Verilog and UVM methodology.
  • The ideal candidate will drive functional verification of RTL designs at Sub System level or SoC Level including simulation, debugging and coverage closure, ensuring high-quality and robust designs.
  • Candidate must collaborate with design engineers to understand detailed design specifications and target corner cases and various configurations of subsystem levels.
  • The selected individual will generate and analyze verification metrics to regularly track progress and ensure timely coverage closure.
  • Prior experience of participating in design and verification reviews, test plan reviews, methodology reviews, providing technical expertise and insights is necessary.
  • A strong understanding of newer verification techniques and methodologies to improve verification efficiency and effectiveness is required.
Qualifications & Experience:
  • Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related fields.
  • Proficiency in verification languages and methodologies such as SystemVerilog, UVM, and other industry-standard tools.
  • Experience with scripting languages (e.g. Python, Perl, Tcl) for automation and tool integration.
  • Excellent problem-solving skills and attention to detail.
  • Strong oral and written communication skills with an ability to work as a team player in a fast-paced collaborative environment.
  • Track record of successfully participating in or leading verification of complex IP blocks, Subsystems or SoC Modules.
  • 3-15 years of experience in design verification, with a focus on Subsystem/SoC verification.

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