Current jobs related to CPU subsystem Design and Verification - India - ACL Digital


  • India beBeeMicroarchitect Full time

    Job DescriptionWe are seeking a talented and motivated Mid-Level CPU Subsystem Design and Verification Engineer to join our team.The ideal candidate will participate in the design of CPU subsystems, collaborating with architects and design engineers. He/she will contribute to micro-architectural decisions, considering performance, power, and area trade-offs....


  • India Tessolve Full time

    ### Job Description: ASIC Design Verification Engineer**Location:** - Bangalore, Chennai, Hyderabad, Noida,Malaysia, Germany.**Experience Range:** 5 to 20+ years**Key Responsibilities:**- Develop and execute test plans to verify complex ASIC designs.- Utilize System Verilog (SV) and UVM methodologies for verification tasks.- Perform functional, formal, GLS...


  • India Reqres Full time

    SoC Design Verification (DV) Engineer- 8 to 12 years- BangaloreWe are looking for a skilled and experienced SoC Design Verification Engineer with 8 to 12 years of hands-on experience in SoC DV. The ideal candidate will have deep technical expertise in System Verilog/UVM, CPU subsystem verification, and testbench development, with a strong ability to debug...


  • India Taggd Full time

    JD for DV lead:7+ years of hands-on DV experience in SystemVerilog/UVM.Must be able to own and drive the verification of a block / subsystem or a SOC.Should have a track record of leading a team of engineers.Extensive experience in IP/sub-system and/or SoC level verification based on SV/UVM.Experience in Tesplan and Testbench development,Execution of test...


  • India Taggd Full time

    JD for DV lead:7+ years of hands-on DV experience in SystemVerilog/UVM.Must be able to own and drive the verification of a block / subsystem or a SOC.Should have a track record of leading a team of engineers.Extensive experience in IP/sub-system and/or SoC level verification based on SV/UVM.Experience in Tesplan and Testbench development,Execution of test...


  • greater bengaluru area, india Tessolve Full time

    ### Job Description: ASIC Design Verification Engineer **Location:** - Bangalore, Chennai, Hyderabad, Noida,Malaysia, Germany. **Experience Range:** 5 to 20+ years **Key Responsibilities:** - Develop and execute test plans to verify complex ASIC designs. - Utilize System Verilog (SV) and UVM methodologies for verification tasks. - Perform functional,...


  • India Eximietas Design Full time

    Hi All,Greetings' from Eximietas Design....We are HiringSenior SOC Design Verification EngineerExperience:5+ yearsLocation:Bangalore and Visakhapatnam.Job Description:We are seeking an experienced and highly skilledSenior SOC Design Verification Engineerwith a strong background inPCIE (Peripheral Component Interconnect Express)to join our team. As a key...


  • India Eximietas Design Full time

    Hi All,Greetings' from Eximietas Design....We are HiringSenior SOC Design Verification Engineer.Experience:5+ years.Location:Bangalore.Job Description:We are seeking an experienced and highly skilledSenior SOC Design Verification Engineerwith a strong background inPCIE (Peripheral Component Interconnect Express)to join our team. As a key member of our team,...


  • India Tenstorrent Full time

    Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high...


  • India L&T Technology Services Full time

    Qualifications and Skills for DV Positions:Bachelor's or Masters degree in Computer Science, Electronics Engineering or equivalent practical experience7/10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification7/ 10+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based...

CPU subsystem Design and Verification

4 weeks ago


India ACL Digital Full time
Talented and motivated Mid-Level CPU Subsystem Design and Verification Engineer to join our growing team.

Responsibilities :

Design :
Participate in the design of CPU subsystems, collaborating with architects and design engineers.
Contribute to micro-architectural decisions, considering performance, power, and area trade-offs.
Develop detailed design documents and schematics for assigned subsystems.

Verification :
Develop comprehensive test plans and verification strategies for assigned subsystems.
Create and implement SystemVerilog/UVM testbenches, checkers, and coverage groups.
Execute verification plans, analyse results, and debug failures effectively.
Work closely with verification engineers and architects to identify and resolve issues.
Additional Responsibilities:
Stay up-to-date on the latest advancements in CPU architecture and verification methodologies.
Contribute to technical discussions and actively participate in design reviews.
Collaborate effectively with cross-functional teams to achieve project goals.

Qualifications :
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
3-5 years of experience in CPU design or verification.
Strong understanding of digital design principles, RTL, and verification methodologies (UVM, SystemVerilog).
Experience with Verilog/SystemVerilog coding and debugging.
Familiarity with CPU microarchitecture concepts and verification best practices.
Excellent analytical and problem-solving skills.
Strong communication and collaboration skills.
Ability to work independently and as part of a team.

Benefits :
Competitive salary and benefits package.
Opportunity to work on cutting-edge technology and make a real impact.

Regards,
Krishna
Mail Id: krishnaprasath.s@acldigital.com