Senior Memory Compiler Design Engineer
7 days ago
M31 Technology Corporation is a professional silicon intellectual property (IP) provider with substantial experiences in IP development, IC design, and electronic design automation fields. We specialize in providing high-speed interface IPs, memory compilers, and standard cell library solutions.
Job OverviewThis is a full-time on-site role for a Senior Design Engineer at M31 Technologies India Private Limited located in Bengaluru. The successful candidate will be responsible for leading and designing Sram/Rom memory Compilers in cutting-edge FinFet nodes like 12nm, 6nm, 5nm, 3nm, 2nm.
Key Responsibilities- Designing key circuits such as write assist, read assist, sense amplifier, wordline drivers, advanced power-saving modes like retention, light sleep, etc., on FINFET technology.
- Providing technical guidance and contributing to the development of architecture and circuits on key embedded Sram and Rom memories.
- Collaborating with cross-functional teams and mentoring junior engineers.
We are looking for an expert in memory margining techniques and familiar with industry-standard EDA tools like Virtuso, Hspice, Solido, ESPCV, StarRC, PrimeSim. The ideal candidate should have expertise in memory architecture definition, PPA optimization for best-in-class memory compilers. Additionally, they should possess a deep understanding of various design and verification methodologies and flows.
Preferred Qualifications- Experience in leading FinFet technology memory compiler development.
- Familiarity with Arm CPU L1 & L2 memory instances.
- Knowledge of low-power design techniques.
- Advanced degree in Electrical/Computer Engineering or a related field.
The estimated salary for this role is ₹25-35 lakhs per annum, depending on experience and qualifications. If you're passionate about memory design and eager to join a dynamic team, apply now
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