Senior VLSI Memory Layout Architect

6 days ago


Bengaluru, Karnataka, India SignOff Semiconductors Full time
Job Description

We are seeking a highly skilled Memory Array Layout Designer to join our team at SignOff Semiconductors.

About the Role

This is a challenging opportunity for an experienced physical design engineer to lead the development of high-performance memory arrays. The successful candidate will have a strong background in VLSI design and experience with industry-standard EDA tools.

Key Responsibilities
  • Develop tight-pitched memory array layouts using SRAM and MRAM technologies
  • Create hierarchical layouts for row decoders, write drivers, assist circuits, sense amplifiers, and memory control circuits
  • Collaborate with circuit designers to meet design specifications and perform physical/reliability verification checks
  • Design and develop solutions to address layout effects and related constraints on speed, parasitics, area, power, and other second-order effects
Requirements
  • Bachelor's or Master's degree in Electrical Engineering or Computer Science
  • 4-8 years of experience in VLSI design and physical design engineering
  • Strong understanding of VLSI concepts, including CMOS, IC fabrication, FINFET, RC networks, and more
  • Proficiency in industry-standard EDA tools, such as Virtuoso, Custom Compiler, and Calibre
What We Offer

SignOff Semiconductors offers a competitive salary range of $120,000 - $180,000 per year, depending on experience, as well as opportunities for professional growth and development in a dynamic and innovative environment.



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