STA(Static Timing Analysis) Engineer

3 days ago

Bengaluru, Karnataka, India Capgemini Engineering Full time
Experience: 5+years

Location: Bangalore

Job Description:

As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process corners.

Key Responsibilities:

- Own full-chip and block-level timing closure across RTL, synthesis, and physical implementation stages.
- Develop and validate timing constraints (SDC) for blocks, partitions, and full-chip designs.
- Perform timing analysis using industry-standard tools (e.g., PrimeTime, Tempus).
- Collaborate with design and architecture teams to define timing requirements and resolve timing violations.
- Analyze timing scenarios, margins, and corner cases.
- Integrate third-party IPs and derive timing signoff requirements.
- Optimize timing paths and reduce signoff corners by merging modes.
- Automate STA flows using scripting languages.
- Support test mode timing closure (e.g., scan shift, scan capture, BIST).

Primary Skills:

- Static Timing Analysis (STA): Deep expertise in STA tools like Synopsys PrimeTime, Cadence Tempus.
- Timing Constraints Development: Proficient in writing and validating SDC constraints.
- Scripting Languages: Strong skills in TCL, Perl, Python for automation.
- ASIC/SoC Design Knowledge: Understanding of synthesis, physical design, and backend flows.
- Corner and Mode Analysis: Experience with timing corners, process variations, and signal integrity.
- Constraint Debugging: Familiarity with tools like Synopsys GCA (Galaxy Constraint Analyzer).

Secondary Skills:

- Tool Proficiency: Experience with tools like Genus, Timevision, Fishtail, Tweaker.
- Low-Power Design: Knowledge of UPF, multi-voltage domains, and power gating.
- Custom IP Integration: Handling of PLLs, SerDes, ADC/DAC, GPIO, HSIO.
- Communication & Collaboration: Strong interpersonal skills for cross-functional teamwork.
- Mentorship: Ability to guide and mentor junior engineers.
- Process Node Experience: Familiarity with advanced nodes (3nm, 5nm, 7nm, FinFET).

  • Static Timing Analysis Lead

    3 weeks ago

    Bengaluru, Karnataka, India Cloudious Full time

    Job Title Static Timing Analysis Lead Location Bengaluru India Experience 7 18 years Industry Semiconductors AI Networking ASIC Design Role Overview We re looking for an experienced and driven Static Timing Analysis STA and Timing Signoff Methodology lead In this role you ll be the expert responsible for defining developing and...

  • Static Time Analysis Expert

    3 days ago

    Bengaluru, Karnataka, India beBeeStaticAnalysis Full time ₹ 1,00,00,000 - ₹ 2,00,00,000

    Job Title: Static Time Analysis EngineerJob Overview:We are seeking a highly skilled Static Time Analysis (STA) expert to join our team. As a STA engineer, you will play a critical role in ensuring the timely closure of complex designs.Main Responsibilities:Timing Analysis & Closure:Perform setup, hold, and skew analysis across Full-Chip, Sub-system, and IP...

  • Static Timing Analysis Engineer

    3 days ago

    Bengaluru, Karnataka, India beBeeTiming Full time ₹ 25,00,000 - ₹ 35,00,000

    We are seeking a seasoned Static Timing Analysis (STA) expert to join our dynamic team.Key ResponsibilitiesDevelop and maintain in-depth expertise in STA tools and methodologies.Collaborate with cross-functional teams to ensure timely project delivery.Analyze and resolve complex timing-related issues.Provide technical guidance and support to junior...

  • Lead Static Timing Analysis Engineer

    2 weeks ago

    Bengaluru, Karnataka, India Fiori Technology Solutions Inc Full time ₹ 15,00,000 - ₹ 20,00,000 per year

    We are seeking an experienced Lead STA Engineer to take ownership of the static timing closure process for complex ASIC/SoC designs. In this role, you will lead timing sign-off activities, coordinate with cross-functional teams, and ensure designs meet performance, power, and area targets while achieving first-pass silicon success.Key Responsibilities:Own...

  • Lead Static Timing Analysis Engineer

    4 days ago

    Bengaluru, Karnataka, India Fiori Technology Solutions Inc Full time ₹ 15,00,000 - ₹ 20,00,000 per year

    We are seeking an experienced Lead STA Engineer to take ownership of the static timing closure process for complex ASIC/SoC designs. In this role, you will lead timing sign-off activities, coordinate with cross-functional teams, and ensure designs meet performance, power, and area targets while achieving first-pass silicon success.Key Responsibilities:Own...

  • 16/08/2025) Lead Static Timing Analysis

    3 weeks ago

    Bengaluru, Karnataka, India Fiori Technology Solutions Inc Full time

    About Company:Fiori Technology Solutions Inc is product engineering company with expertise in Semiconductor Design, Embedded systems and AI. With our centers in U.S.A. and India, we are service partners to various fortune 500 companies in the field of Automotive, IOT, Medical Electronics, Consumer Electronics etc.Job Role:We are seeking an experienced Lead...

  • Lead Static Timing Analysis

    2 weeks ago

    Bengaluru, Karnataka, India Fiori Technology Solutions Inc Full time

    About Company: Fiori Technology Solutions Inc is product engineering company with expertise in Semiconductor Design, Embedded systems and AI. With our centers in U.S.A. and India, we are service partners to various fortune 500 companies in the field of Automotive, IOT, Medical Electronics, Consumer Electronics etc. Job Role: We are seeking an experienced...

  • Static Time Analysis Engineer

    23 hours ago

    Bengaluru, Karnataka, India Capgemini Engineering Full time

    Job DescriptionKey Responsibilities:1. Timing Analysis & Closure- Perform setup, hold, and skew analysis across Full-Chip, Sub-system, and IP levels.- Achieve timing closure by resolving violations and optimizing paths.1. Constraint Development- Define and validate timing constraints (clocks, I/O delays, false/multi-cycle paths).- Integrate constraints from...

  • Static Time Analysis Engineer

    1 day ago

    Bengaluru, Karnataka, India Capgemini Engineering Full time

    Job Description Key Responsibilities: Timing Analysis & Closure Perform setup, hold, and skew analysis across Full-Chip, Sub-system, and IP levels. Achieve timing closure by resolving violations and optimizing paths. Constraint Development Define and validate timing constraints (clocks, I/O delays, false/multi-cycle paths). Integrate constraints from...

  • Static Time Analysis Engineer

    3 days ago

    Bengaluru, Karnataka, India Capgemini Engineering Full time

    Job DescriptionKey Responsibilities:Timing Analysis & ClosurePerform setup, hold, and skew analysis across Full-Chip, Sub-system, and IP levels.Achieve timing closure by resolving violations and optimizing paths.Constraint DevelopmentDefine and validate timing constraints (clocks, I/O delays, false/multi-cycle paths).Integrate constraints from multiple IPs...