ASIC RTL Engineer III, Silicon IP/Subsystem

Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.3 years of experience in ASIC design flows and methodologies, IP...

Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.3 years of experience in ASIC design flows and methodologies, IP...

Position: RTL IP Design Engineer Experience: 5+ years Location: Bangalore, India Company: Mettlesemi Systems and Technologies Pvt Ltd Job Type: Full-TimeWe are looking for an RTL IP Design Engineer to join our silicon design team for a high-impact engagement with a prestigious global client. The ideal candidate will have deep expertise in digital IP and...

Summary:We are looking for an experienced Senior/Principal ASIC RTL Design Engineer with 10+ years of hands-on RTL design expertise to join our team in Bangalore. The ideal candidate will own end-to-end RTL design for complex SoCs or large subsystems, from micro-architecture through tapeout and silicon bring-up.Job Description:Own RTL design of SoC-level or...

Job Description:Own RTL design of SoC-level or large subsystems from specification to silicon bring-up.Define and implement micro-architecture; write high-quality, synthesizable RTL in SystemVerilog/Verilog.Work closely with physical design teams for synthesis, timing closure, power, area optimization, DFT hooks, and ECOs.Drive block/subsystem integration...

We are looking for a skilled ASIC RTL Engineer with 5-9 years of experience to join our team in Bengaluru, Hyderabad, Chennai, Pune, Kochi, and Ahmedabad. The ideal candidate will have expertise in IP RTL design targeted for SOC, Static checks, some basic protocols, Low power, Micro Architecture, SoC subsystem/IP design, interface protocols, and scripting...

About Proxelera:Proxelera is apremier Outsourced Product Development (OPD) partner, specializing inSemiconductors, Systems, and Bespoke Hardwaresolutions. We combineprocess excellencewithdeep technical expertiseto deliverinnovative and transformative engineering outcomesfor global clients.Proxelera's mission is to empower clients toaccelerate product...

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science or a related field, or equivalent practical experience5 years of experience in Application-specific integrated circuit (ASIC) development with Verilog/SystemVerilog, Vhsic Hardware Description Language (VHDL), or Chise.Experience in ASIC design...

Summary:Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon bring-up.Responsibilities:Define micro-architecture from specs; write high-quality synthesizable SystemVerilog/Verilog RTL for SoC-level or large subsystems.Own design bring-up, block/subsystem integration, and close on timing,...

Senior ASIC/SoC RTL Engineer/Lead (IP RTL design targeted for SOC, Static checks, some basic protocols) Exp - 4 - 20 Location :Bengaluru, Hyderabad, Pune, Noida, KochiExpertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC)...