Physical Design Engineer
4 months ago
Job Responsibilities:
Development, automation and maintenance of EDA flows and scripts for physical implementation
PPA characterization and optimization of flow for performance-oriented and power-oriented best-in-class IP cores in advanced process nodes, such as 7nm/5nm/3nm/2nm
Manage regression infrastructure that tracks quality of the RTL/flow development as well as the PPA of the key designs
Digital design implementation using Cadence EDA tools - Genus, Innovus, Tempus, Voltus and other backend tools
Participate in benchmarking PPAs for customer engagements
Required skills –
Educational Qualification: MS/MTech/BE/ BTech in Electronics from reputed institutes
3+ years of relevant experience in ASIC design environment
Should have knowledge of complete ASIC Design Flow, including Synthesis, Physical Designing , Timing Analysis and Formal Verification
Experience with Cadence digital design tools will be an added advantage
Hands on scripting languages like Python, Perl, TCL, Unix shell etc
Strong understanding of digital logic design, processor design, and computer architecture is desirable
Should have excellent communication, analytical and problem solving skills
Should be self-motivated and good team player
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Ahmedabad, Gujarat, India Xcel Hires Management Solution Full time**Job Discription**: In Depth experience in Physical Design Implementation & Signoff at block level at 16/7nm technology nodes. Good exposure in Floor planning, CTS, STA, Physical Verification, Basic understanding of timing constraints. Good exposure to ICC2/Innovus/Calibre/Formality/LEC tool set. Well versed in automation skills using shell/tcl/perl/python.
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