Senior Design Verification Engineer
1 week ago
DesignVerification
EngineerAre you passionate about ensuring top-notch quality in chip design? Join our team as a
DesignVerification
Engineer and be a key player in validating
cuttingedge
semiconductor designs
Key Responsibilities:Develop and execute comprehensive test plans for
verification
of complex digital designs.Create and maintain
UVM
-based verification environments.Collaborate with design teams to identify and resolve issues early in the development process.Contribute to
functionalcoverage
,
codecoverage
, and
debugging
activities.Participate in the verification of
ASIC /
FPGA /
SoC
designs across various stages of development.
Skills & Qualifications:Strong 4+ years of experience in design verification using
UVM
,
SystemVerilog
, or similar methodologies.Expertise in writing
testbenches
and
simulation
.Familiarity with tools like
VCS
,
Questa
, and other
EDA
tools.Solid understanding of
RTL
design,
verification
metrics, and debugging techniques.Strong analytical and problem-solving skills.
Location:
Bangalore
&
Ahmedabad
Type: Full-time share your Cv
Prashanth Krishnamurthy
( )
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