Sta(static timing analysis) engineer
2 weeks ago
Experience: 5+yearsLocation: BangaloreJob Description:As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or So C designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process corners.Key Responsibilities:Own full-chip and block-level timing closure across RTL, synthesis, and physical implementation stages.Develop and validate timing constraints (SDC) for blocks, partitions, and full-chip designs.Perform timing analysis using industry-standard tools (e.g., Prime Time, Tempus).Collaborate with design and architecture teams to define timing requirements and resolve timing violations.Analyze timing scenarios, margins, and corner cases.Integrate third-party IPs and derive timing signoff requirements.Optimize timing paths and reduce signoff corners by merging modes.Automate STA flows using scripting languages.Support test mode timing closure (e.g., scan shift, scan capture, BIST).Primary Skills:Static Timing Analysis (STA): Deep expertise in STA tools like Synopsys Prime Time, Cadence Tempus.Timing Constraints Development: Proficient in writing and validating SDC constraints.Scripting Languages: Strong skills in TCL, Perl, Python for automation.ASIC/So C Design Knowledge: Understanding of synthesis, physical design, and backend flows.Corner and Mode Analysis: Experience with timing corners, process variations, and signal integrity.Constraint Debugging: Familiarity with tools like Synopsys GCA (Galaxy Constraint Analyzer).Secondary Skills:Tool Proficiency: Experience with tools like Genus, Timevision, Fishtail, Tweaker.Low-Power Design: Knowledge of UPF, multi-voltage domains, and power gating.Custom IP Integration: Handling of PLLs, Ser Des, ADC/DAC, GPIO, HSIO.Communication & Collaboration: Strong interpersonal skills for cross-functional teamwork.Mentorship: Ability to guide and mentor junior engineers.Process Node Experience: Familiarity with advanced nodes (3nm, 5nm, 7nm, Fin FET).
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Static Timing Analysis
4 days ago
Bengaluru, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) Engineer Job DescriptionJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating...
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Static Timing Analysis
4 hours ago
Bengaluru, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) Engineer Job Description Job Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating...
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Static Timing Analysis
3 days ago
Bengaluru, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) Engineer Job DescriptionJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating...
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Lead Static Timing Analysis
3 days ago
Bengaluru, India Fiori Technology Solutions Inc Full timeJob Description Back Lead Static Timing Analysis (STA) Engineer - Bangalore, India - 10+ - Full-Time We are seeking an experienced Lead STA Engineer to take ownership of the static timing closure process for complex ASIC/SoC designs. In this role, you will lead timing sign-off activities, coordinate with cross-functional teams, and ensure designs meet...
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STA(Static Timing Analysis) Engineer
1 week ago
Bengaluru, India Capgemini Engineering Full timeExperience: 5+yearsLocation: BangaloreJob Description:As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process...
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Static Timing Analysis
4 days ago
Bengaluru, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) Engineer Job DescriptionJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with...
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Static Timing Analysis
5 days ago
Bengaluru, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) Engineer Job DescriptionJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with...
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Static Timing Analysis
5 days ago
Bengaluru, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) Engineer Job Description Job Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating...
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STA(Static Timing Analysis) Engineer
7 days ago
Bengaluru, India Capgemini Engineering Full timeExperience: 5+yearsLocation: BangaloreJob Description:As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process...
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STA(Static Timing Analysis) Engineer
4 weeks ago
Bengaluru, Karnataka, India Capgemini Engineering Full timeExperience: 5+yearsLocation: BangaloreJob Description:As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process...
