VLSI - Synthesis and Static Timing Analysis - Senior Design Engineer

Company: Eteros Technologies India Private Limited Eteros Technologies, Inc. is a Semiconductor Engineering services startup, head quartered in the heart of the Silicon Valley, San Jose, CA, USA. Eteros Technologies India Pvt Ltd is a wholly owned subsidiary offices in Bangalore, Noida, Hyderabad and Ahmedabad • Our world-wide customers are amongst The...

Company: Eteros Technologies India Private LimitedEteros Technologies, Inc. is a Semiconductor Engineering services startup, head quartered in the heart of the Silicon Valley, San Jose, CA, USA. Eteros Technologies India Pvt Ltd is a wholly owned subsidiary offices in Bangalore, Noida, Hyderabad and Ahmedabad• Our world-wide customers are amongst The Who's...

SoC level – Static timing Analysis EngineerExperience : 10+ years of relevant experienceExpectations:Candidate should have strong STA fundamentals.Has done timing sign-off including timing margin calculations independently on SoC level.Experience in handling STA of multi-power domain designs.STA flow enhancement, abstraction with bottleneck...

SoC level – Static timing Analysis EngineerExperience: 10+ years of relevant experienceExpectations:Candidate should have strong STA fundamentals.Has done timing sign-off including timing margin calculations independently on SoC level.Experience in handling STA of multi-power domain designs.STA flow enhancement, abstraction with bottleneck...

Senior Manager / Manager Physical Design (10-15 years experience)HyderabadFounded by highly respected Silicon Valley veterans - with its design centers established inSanta Clara and HyderabadSenior Manager / Manager Physical Design (10-15 years experience)Preferred Experience3nm/5nmMultiple TapeoutsComplex chips design, like Server ChipsFull-chip...

We are looking for a Solutions Engineer Staff to join the team. Does this sound like a good role for you? Develop Synopsys Silicon Lifecycle Management tool flows, methodologies, and automation to meet test requirements for High volume manufacturing, Production, In-ramp, In-Field etc., that includes Memory BIST, Logic BIST, Scan compression, Boundary scan,...

VLSI Design ExpertiseWe are seeking a highly skilled VLSI Engineer to join our team at Tanishi consultants. The ideal candidate will have expertise in designing and developing leading-edge ICs, with a strong focus on analog and mixed-signal circuits.Key Responsibilities- Design and develop high-performance ICs using advanced design techniques and tools.-...

Job Role: Physical Design Engineer- Senior/LeadLocation: Bangalore, Hyderabad, Noida ,Chennai and AhmedabadExperience Required: 4+ROLE & RESPONSIBILITIES- Engineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal...

Job Role: Physical Design Engineer- Senior/LeadLocation: Bangalore, Hyderabad, Noida ,Chennai and AhmedabadExperience Required: 4+ROLE & RESPONSIBILITIESEngineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal...

Physical Design Director (Technical )Location: BangaloreWe enable tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers,...

Job Role: Physical Design Engineer- Senior/LeadLocation: Bangalore, Hyderabad, Noida ,Chennai and AhmedabadExperience Required: 4+ROLE & RESPONSIBILITIESEngineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal...

Senior Manager / Manager Physical Design (10-15 years experience)HyderabadFounded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara and Hyderabad Senior Manager / Manager Physical Design (10-15 years experience)Preferred Experience3nm/5nmMultiple TapeoutsComplex chips design, like Server ChipsFull-chip...

Job Description:">Mulya Technologies is seeking an experienced Senior ASIC Design Engineer to join our team. As a key member of our design team, you will play a crucial role in the design and development of complex ASICs and System-on-Chip architectures for various electronic devices.">About the Role:">We are looking for a highly skilled engineer with...

Job Title: Senior ASIC Design Engineer (Physical Design & Timing Optimization)Location: WFO / Hyderabad)Experience: 5-8 YearsNotice Period: 30- 45 daysJob Description:We are looking for a skilled Senior ASIC Design Engineer with expertise in Physical Design and Timing Optimization . The ideal candidate will have hands-on experience with Hierarchical...

Job Title: Senior ASIC Design Engineer (Physical Design & Timing Optimization)Location: WFO / Hyderabad)Experience: 5-8 YearsNotice Period: 30- 45 daysJob Description:We are looking for a skilled Senior ASIC Design Engineer with expertise in Physical Design and Timing Optimization. The ideal candidate will have hands-on experience with Hierarchical...

Senior Physical Design Engineer: Exp-6+yrs KEY RESPONSIBILITIES: Lead the team responsible for Synthesis, Physical Design, timing and Physical closure Manage a large team of internal and external resources Responsible for ensuring the completion of the SOC chip on schedule with high QOR Physical implementation of block level and subsystem level Contribute...

Senior Physical Design Engineer:Exp-6+yrsKEY RESPONSIBILITIES:- Lead the team responsible for Synthesis, Physical Design, timing and Physical closure- Manage a large team of internal and external resources- Responsible for ensuring the completion of the SOC chip on schedule with high QOR- Physical implementation of block level and subsystem level- Contribute...

Senior Physical Design Engineer:Exp-6+yrsKEY RESPONSIBILITIES:Lead the team responsible for Synthesis, Physical Design, timing and Physical closureManage a large team of internal and external resourcesResponsible for ensuring the completion of the SOC chip on schedule with high QORPhysical implementation of block level and subsystem levelContribute to...

Senior Physical Design Engineer:Exp-6+yrsKEY RESPONSIBILITIES:Lead the team responsible for Synthesis, Physical Design, timing and Physical closureManage a large team of internal and external resourcesResponsible for ensuring the completion of the SOC chip on schedule with high QORPhysical implementation of block level and subsystem levelContribute to...

Senior Staff FPGA Design Engineers (prototyping)Location: BangaloreExperience: 8yrs - 12yrsOverview:Synopsys’s HAPS Based Prototyping includes HAPS hardware and HAPS ProtoCompiler tools that provide design automation and debug for the HAPS Series of FPGA-based prototypes. Features include FPGA synthesis for HAPS, system planning, RTL debug and system...