Physical Verification Engineer

Physical Verification Engineers Experience : 2-5 years Location : BangaloreJob Description – Physical Verification EngineerKey ResponsibilitiesPerform physical verification for SoCs, cores, and block-level designs. Run and debug DRC (Design Rule Check), LVS (Layout vs. Schematic), ERC (Electrical Rule Check), Antenna checks, and DFM (Design for...

Physical Verification EngineerJob DescriptionWork with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out. Co-work with Place & Route team to resolve full-chip layout integration issues. Work with various implementation team to drive Physical Verification...

Physical Verification Engineers Experience : 3 years Location : Bangalore Will be responsible for Runing Physical verification analysis for multiple designs, analyzing results and providing fixes to address the issues for complex cpu designs, in latest technology nodes. n (LVS, DRC, ERC, PERC, Antenna, DFM) at block and top levels. Collaborate with Physical...

Physical Verification EngineersExperience : 3 years Location : Bangalore Will be responsible for Runing Physical verification analysis for multiple designs, analyzing results and providing fixes to address the issues for complex cpu designs, in latest technology nodes. n (LVS, DRC, ERC, PERC, Antenna, DFM) at block and top levels. Collaborate with Physical...

Physical Verification EngineersExperience : 3 years Location : Bangalore Will be responsible for Runing Physical verification analysis for multiple designs, analyzing results and providing fixes to address the issues for complex cpu designs, in latest technology nodes. n (LVS, DRC, ERC, PERC, Antenna, DFM) at block and top levels. Collaborate with Physical...

Physical Verification EngineerExperience: 2 to 5 YearsLocation: BangaloreNotice Period: ImmediateJob DescriptionKey Responsibilities:- Perform Physical Verification checks including DRC, LVS, ERC, and Antenna checks at block and full-chip level. - Work with foundry rule decks (TSMC / Samsung / GF / Intel / UMC etc.) to ensure design sign-off compliance. -...

Physical Verification EngineerExperience: 2 to 5 Years Location: Bangalore Notice Period: ImmediateJob DescriptionKey Responsibilities: PerformPhysical Verificationchecks includingDRC, LVS, ERC , andAntennachecks atblock and full-chip level . Work withfoundry rule decks(TSMC / Samsung / GF / Intel / UMC etc.) to ensure design sign-off compliance. Debug and...

Role : Sr Physical Design Lead/BE IntegrationThis position is for senior level engineer Full Chip Physical Design/Integrations/ SoC Floor planning/Bump Planning/ Pin Assignments /Feed through/ LFU Optimization/Physical Verification, Power design/implementation/signoff. He must have hands on Physical Design experience and must have handled RTL to GDS II at...

Role : Sr Physical Design Lead/BE IntegrationThis position is for senior level engineer Full Chip Physical Design/Integrations/ SoC Floor planning/Bump Planning/ Pin Assignments /Feed through/ LFU Optimization/Physical Verification, Power design/implementation/signoff. He must have hands on Physical Design experience and must have handled RTL to GDS II at...

Role : Sr Physical Design Lead/BE Integration This position is for senior level engineer Full Chip Physical Design/Integrations/ SoC Floor planning/Bump Planning/ Pin Assignments /Feed through/ LFU Optimization/Physical Verification, Power design/implementation/signoff. He must have hands on Physical Design experience and must have handled RTL to GDS II at...