RTL Design Engineer

RTL Design Engineer(CXL) Experience - 5+yrs Location- BangaloreJD Strong RTL designer with IP design experience SoC Integration Interconnect Generation for a given configuration CXL 3.1 and above design experience

Job Description RTL Design Engineer (ASIC) Location: Chennai, Tamil Nadu Experience: 1 to 3 Years Job Description Job Role: - Design and implement RTL for wireless modem IPs and SoC subsystems using Verilog/SystemVerilog. - Develop micro-architecture specifications and deliver high-quality, synthesizable RTL. - Integrate complex subsystems into SoC...

Job Description VLSI Domain RTL/FPGA Design Engineer(Experienced) Min 3 - 7 Years of Experience BE/B.Tech in Electronics/Electronics & Communication or ME/M.Tech in Electronics/VLSI Design or closely related degree Ahmedabad, Bangalore Roles & Responsibilities - RTL programming (Verilog/System Verilog or VHDL). - Knowledge of complete FPGA Design Development...

Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences - from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion...

Job Description:RTL Design ( Ethernet ) Experience : 5-8 years Location : HyderabadCandidate should be with strong RTL design experience. Strong design Experience in Ethernet IPs or Ethernet protocol domain. knowledge in Verilog/VHDL languages scripting languages TCL/Perl/python any one. Knowledge of AXI Protocols.

Senior ASIC/SoC RTL Engineer/Lead (IP RTL design targeted for SOC, Static checks, some basic protocols) Exp - 4 - 20 Location :Bengaluru, Hyderabad, Pune, Noida, KochiExpertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC)...

Job Description RTL Design Engineer Experience : 2-3 years Location : Hyderabad Knowledge in RTL Coding in Verilog or VHDL Strong understanding of Logic design, Digital design, System design aspects, FPGA flow, Design Constraints etc. Knowledge in Xilinx FPGA architecture and design flows like IPI, XDC etc. Good Knowledge in Tcl, Python scripting...

Job Description Job Title: RTL Design Engineers Exp Level: 2-3 yrs Loctaion: Hyderabad Job Description: 1. Seeking a motivated RTL Design Engineer to develop, integrate, and verify digital logic using Verilog/SystemVerilog. 2. Responsibilities include ASIC/SoC IP integration, linting, synthesis, and working closely with verification teams. 3. Requires strong...

Hi All,Job Location: Bangalore,hyderabadNotice Period: 15 days to 30 DaysMinimum: 5+ Years1.Experience in Low power RTL design, microarchitecture, synthesis, timing closure, Low power estimation. Should be proficient in Verilog.2. Should have experience in optimization of microarchitecture and RTL for area and power reduction. Experience with Arithmetic...

Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to...