RTL Design Engineer-CXL

Hi All,Job Location: Bangalore,hyderabadNotice Period: 15 days to 30 DaysMinimum: 5+ Years1.Experience in Low power RTL design, microarchitecture, synthesis, timing closure, Low power estimation. Should be proficient in Verilog.2. Should have experience in optimization of microarchitecture and RTL for area and power reduction. Experience with Arithmetic...

Position SummaryRole and Responsibilities5 to 14 years of work experience in VLSI RTL IP or Subsystem designJob Description/background:· Designing and developing CXL and DRAM controller (DDR4/5) based intellectual property.  Design and Engage with other architects within the IP level to drive the Micro-Architectural definition.· Deliver quality...

Job Description RTL Design Engineer (ASIC) Location: Chennai, Tamil Nadu Experience: 1 to 3 Years Job Description Job Role: - Design and implement RTL for wireless modem IPs and SoC subsystems using Verilog/SystemVerilog. - Develop micro-architecture specifications and deliver high-quality, synthesizable RTL. - Integrate complex subsystems into SoC...

Job Description VLSI Domain RTL/FPGA Design Engineer(Experienced) Min 3 - 7 Years of Experience BE/B.Tech in Electronics/Electronics & Communication or ME/M.Tech in Electronics/VLSI Design or closely related degree Ahmedabad, Bangalore Roles & Responsibilities - RTL programming (Verilog/System Verilog or VHDL). - Knowledge of complete FPGA Design Development...

Job Description Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a...

RTL DesignLocation: BangaloreExperience- 4+ yearsMust have- Hands-on experience and expert-level knowledge in RTL design and coding in Verilog and VHDL - Hands-on experience and expert-level knowledge in SoC integration of ARM core-based designs - Experience in working with AMBA Bus- AXI, AHB, APB. - Experience in IP development: Standard Ips like PCIe Gen5...

Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences - from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion...

Job Description:RTL Design ( Ethernet ) Experience : 5-8 years Location : HyderabadCandidate should be with strong RTL design experience. Strong design Experience in Ethernet IPs or Ethernet protocol domain. knowledge in Verilog/VHDL languages scripting languages TCL/Perl/python any one. Knowledge of AXI Protocols.

Job Description Senior Design Verification Engineer We are seeking talented Design Verification Engineers with proven expertise in industry-standard protocols such as PCIe and CXL. You will play a key role in the functional verification of designs, from developing block-level and system-level verification plans to writing test sequences, executing tests, and...

Senior ASIC/SoC RTL Engineer/Lead (IP RTL design targeted for SOC, Static checks, some basic protocols) Exp - 4 - 20 Location :Bengaluru, Hyderabad, Pune, Noida, KochiExpertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC)...