RTL Release Principal Design Engineer
4 weeks ago
College education in Electronics Engineering or Computer EngineeringExp- 7-12 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional simulation using Verilog/System Verilog. - Good in Scripting languages(Shell, Perl, TCL, Python) and automation of design database qualification and packaging. Checks and validation of package consistency. - Familiarity with Power Flow (UPF/CPF). - Able to collaborate with IP-development teams and facilitate high-quality releases. - Maintaining package and release timelines for various projects. Time management skills enough to balance multiple high-priority projects. - Bug reporting and resolution closure with IP providers - Ability to debug synthesis/timing analysis constraints, reports, logs - Ability to learn new tools/flows and develop methodology if needed. - Ability to build and maintain close relationships with Designers and Application Engineers. - Fastidious approach to building automated processes. - Strong interpersonal and relationship-building skills.Additional Desirable Qualifications: - Familiarity with SerDes/DDR/other Design-IP’s & Analog design flows - Familiarity with IP release and tracking management systems.
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Rtl Release Principal Design Engineer
3 days ago
New Delhi, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer EngineeringExp- 7-12 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional simulation...
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Sr RTL Principal Design Engineer
4 weeks ago
New Delhi, India Cadence System Design and Analysis Full time- RTL Design Engineer for Interface Controller IP development team. - Position is based in Bangalore or Noida. - The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. - The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are...
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Sr RTL Principal Design Engineer
3 weeks ago
New Delhi, India Cadence System Design and Analysis Full timeRTL Design Engineer forInterface Controller IP developmentteam. Position is based inBangaloreor Noida. The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...
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Sr RTL Principal Design Engineer
2 weeks ago
New Delhi, India Cadence System Design and Analysis Full timeRTL Design Engineer forInterface Controller IP developmentteam. Position is based inBangaloreor Noida. The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...
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RTL Design Lead
3 weeks ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeJob Title: RTL Design Engineer (Mid–Senior Level)Location: [BLR / HYD]Experience: 7– 15 yearsEmployment Type: Full-timeDepartment: Digital Design / SoC EngineeringPosition OverviewWe are seeking a highly skilled RTL Design Engineer with strong experience in digital design, architecture bring-up, RTL integration at SoC level, and RTL quality sign-off. The...
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RTL Design Lead
2 weeks ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeJob Title: RTL Design Engineer (Mid–Senior Level)Location: (BLR / HYD)Experience: 7– 15 yearsEmployment Type: Full-timeDepartment: Digital Design / SoC EngineeringPosition OverviewWe are seeking a highly skilled RTL Design Engineer with strong experience in digital design, architecture bring-up, RTL integration at SoC level, and RTL quality sign-off. The...
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Senior/Principal ASIC RTL Design Engineer
4 weeks ago
New Delhi, India Proxelera Full timeMy name is Shahid I am reaching out with a role that fits engineers who enjoy real ownership, from shaping micro-architecture to watching their RTL come alive in silicon. If you’re looking for a space where your design decisions actually matter, this one is worth your time.Job Title - Senior/Principal ASIC RTL Design Engineer (SoC/Subsystem)Location...
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Senior/Principal ASIC RTL Design Engineer
4 weeks ago
New Delhi, India Proxelera Full timeMy name is Shahid I am reaching out with a role that fits engineers who enjoy real ownership, from shaping micro-architecture to watching their RTL come alive in silicon. If you’re looking for a space where your design decisions actually matter, this one is worth your time.Job Title- Senior/Principal ASIC RTL Design Engineer (SoC/Subsystem)...
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Senior ASIC RTL Designer
3 weeks ago
New Delhi, India Eximietas Design Full timePosition: ASIC RTL Design Engineer Location: Bangalore / Hyderabad Experience: 6+ years Design and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks. Create micro-architecture specs and ensure designs meet performance, power, and area targets. Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...
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Senior/Principal ASIC RTL Design Engineer
4 weeks ago
Delhi, India Proxelera Full timeMy name is Shahid I am reaching out with a role that fits engineers who enjoy real ownership, from shaping micro-architecture to watching their RTL come alive in silicon. If you’re looking for a space where your design decisions actually matter, this one is worth your time.Job Title- Senior/Principal ASIC RTL Design Engineer...