Senior/Principal ASIC RTL Design Engineer
4 weeks ago
My name is Shahid I am reaching out with a role that fits engineers who enjoy real ownership, from shaping micro-architecture to watching their RTL come alive in silicon. If you’re looking for a space where your design decisions actually matter, this one is worth your time.Job Title- Senior/Principal ASIC RTL Design Engineer (SoC/Subsystem) Location-Bangalore, KarnatakaJob Description : Job Summary:Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon bring-up. Responsibilities: Define micro-architecture from specs; write high-quality synthesizable SystemVerilog/Verilog RTL for SoC-level or large subsystems. Own design bring-up, block/subsystem integration, and close on timing, power, and area with synthesis and PnR teams. Drive design reviews, close bugs, and support silicon validation and post-silicon debug. Collaborate with DV to define test plans, assertions, and coverage goals; support emulation/FPGA only as a secondary validation aid (not counted toward the 8 years). Must-have qualifications: 8+ years of hands-on ASIC RTL development experience (FPGA work does not count toward the 10 years). Multiple production ASIC tapeouts owning significant SoC or subsystem functionality (e.g., interconnects, coherency, memory subsystem, high-speed I/O, security, or power-management islands). Strong SystemVerilog/Verilog RTL and micro-architecture skills, including clock/reset design, low-power techniques (UPF/retention/isolation), and AMBA/standard bus protocols (AXI/ACE/AHB/APB). Proven collaboration with physical design on synthesis constraints, timing closure, DFT hooks, and ECOs. Proven silicon bring-up experience for owned blocks/subsystems.Nice to have: Exposure to coherency protocols, cache/memory controllers, DDR/PCIe subsystems, security/crypto blocks. SVA for design-level assertions, performance modeling, or power/perf analysis skills. Scripting for design productivity (Tcl/Python), used in service of hands-on RTL work.Best, Shahid
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Senior ASIC RTL Designer
3 weeks ago
New Delhi, India Eximietas Design Full timePosition: ASIC RTL Design Engineer Location: Bangalore / Hyderabad Experience: 6+ years Design and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks. Create micro-architecture specs and ensure designs meet performance, power, and area targets. Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...
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Senior/Principal ASIC RTL Design Engineer
4 weeks ago
Delhi, India Proxelera Full timeMy name is Shahid I am reaching out with a role that fits engineers who enjoy real ownership, from shaping micro-architecture to watching their RTL come alive in silicon. If you’re looking for a space where your design decisions actually matter, this one is worth your time.Job Title- Senior/Principal ASIC RTL Design Engineer...
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ASIC SOC RTL Design Lead
7 days ago
New Delhi, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads..!Experience: 8+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled ASIC...
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ASIC RTL Design Engineer
3 days ago
New Delhi, India Proxelera Full timeLooking for your next big challenge in ASIC Design?We’re hiring ASIC Design Engineers with 8–15 years of experience to join our team in Hyderabad!If you have expertise in RTL design, Verilog coding, SoC integration, synthesis, timing closure, and have completed at least one tape-out cycle, we’d love to connect with you.Location: HyderabadExperience:...
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ASIC RTL Design Engineer
3 days ago
New Delhi, India Proxelera Full timeLooking for your next big challenge in ASIC Design?We’re hiring ASIC Design Engineers with 8–15 years of experience to join our team in Hyderabad!If you have expertise in RTL design, Verilog coding, SoC integration, synthesis, timing closure, and have completed at least one tape-out cycle, we’d love to connect with you.Location: HyderabadExperience:...
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ASIC RTL Design Engineer
3 weeks ago
New Delhi, India ACL Digital Full timeRTL (ASIC) Design Engineer Experience : 1-3 Years Location : HyderabadInterested,please share your updated resume to janagaradha.n@acldigital.com
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Asic Rtl Design Engineer
2 weeks ago
New Delhi, India Tech Mahindra Full timeGreetings from Tech Mahindra !!We are hiring Champions in Semicon Industry for exciting career opportunities across various rolesSkill detailed are as below, please take time to go through and do please refer also your friends.Tech Mahindra Hiring ASIC RTL Engineers for Bengaluru.Exp:4-15yrs Location: Bengaluru NP: 0-30days Asic RTL Design, Lint, CDC,...
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Asic Rtl Design Engineer
2 weeks ago
New Delhi, India Tech Mahindra Full timeGreetings from Tech Mahindra !!We are hiring Champions in Semicon Industry for exciting career opportunities across various rolesSkill detailed are as below, please take time to go through and do please refer also your friends.Tech Mahindra Hiring ASIC RTL Engineers for Bengaluru.Exp:4-15yrs Location: Bengaluru NP: 0-30days Asic RTL Design, Lint, CDC,...
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ASIC RTL Design Engineer
7 days ago
New Delhi, India Tech Mahindra Full timeGreetings from Tech Mahindra !!We are hiring Champions in Semicon Industry for exciting career opportunities across various rolesSkill detailed are as below, please take time to go through and do please refer also your friends.Tech Mahindra Hiring ASIC RTL Engineers for Bengaluru.Exp:4-15yrs Location: Bengaluru NP: 0-30days Asic RTL Design, Lint, CDC,...
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ASIC SOC RTL Design Lead
4 weeks ago
Delhi, India Eximietas Design Full timeHi All,Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains.We are Hiring: ASIC SOC RTL Design Leads/Architect.Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already...
