Sr RTL Principal Design Engineer
3 weeks ago
RTL Design Engineer forInterface Controller IP developmentteam. Position is based inBangaloreor Noida. The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as part of verification regressions, supporting customers, ensuring design is clean for LINT and CDC design guidelines. Position Requirements: BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer, with a large portion of the recent work experience on RTL design and development. 8-16 years of core RTL Design experience using Verilog is a must. System Verilog experience and experience with UVM based environment usage / debugging is required. PCIe/CXL/IDE experience is needed. Prior experience in implementation of complex protocols is a must. Prior experience in IP development teams would be an added advantage. Scripting knowledge is an advantage
-
Sr RTL Principal Design Engineer
2 weeks ago
New Delhi, India Cadence System Design and Analysis Full time- RTL Design Engineer for Interface Controller IP development team. - Position is based in Bangalore or Noida. - The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. - The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are...
-
Principal RTL Engineer
2 weeks ago
New Delhi, India Mulya Technologies Full timePrincipal RTL Engineer (AI & Multimedia ) Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ BangaloreOur pay comprehensively beats "ALL" Semiconductor product players in the Indian market.We are seeking a highly skilled Principal RTL Engineer with strong expertise in VLSI...
-
RTL Release Principal Design Engineer
2 weeks ago
New Delhi, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer Engineering Exp- 7-12 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional...
-
ASIC SOC RTL Design Architect
2 weeks ago
New Delhi, India Eximietas Design Full timeHi All,Eximietas Design Hiring Senior RTL Design( Micro-architecture )Architects / Sr. Manager. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US.❖ Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics. ❖ Engineering10+ yearsof ASIC...
-
RTL Release Principal Design Engineer
1 week ago
New Delhi, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer EngineeringExp- 7-12 Yrs- Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc.- Ability to debug existing Verilog/System verilog test cases with little or no help from the designer.- Functional simulation...
-
Sr Principal PD Design Engineer
2 weeks ago
New Delhi, India Cadence System Design and Analysis Full timeThis is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher frequencies on latest Tech. nodes. Day-to-day tasks include floorplanning, placement, clock tree synthesis, routing,...
-
ASIC SOC RTL Design Lead
3 weeks ago
New Delhi, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads ..!Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled...
-
RTL Micro Architect
2 weeks ago
New Delhi, India Eximietas Design Full timeEximietas Hiring:ASIC SOC RTL Micro ArchitectExperience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled RTL Micro Architect to join our growing team. As a key contributor, you will play a critical role in...
-
RTL Design Engineer
1 week ago
New Delhi, India ACL Digital Full timeJob Title: RTL Design Engineers Exp Level: 5+ yrs Loctaion: Hyderabad/BangaloreJob Description: • RTL coding knowledge • Top-level (SOC) level basic industry standard Arch knowledge • SoC & IP level Integration knowledge • IPXACT knowledge • IORING and Phys & GPIOs basic functionality • Design Partitioning(Tilification) knowledge • Design RTL...
-
Lead RTL Design Engineer
3 weeks ago
New Delhi, India ACL Digital Full timeLead RTL Design EngineersExperience Level:10+ years of RTL design and development Job Description: Silicon Design Engineer Location: Hyderabad and BangaloreBasic Job Deliverable: Silicon Design Engineer (RTL Design and Development) o Responsible for RTL design and development o Responsible for generating documents, such as requirements specification, design,...