STA Engineers
2 weeks ago
Static Timing Analysis (STA) EngineerJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and physical design teams to achieve the target operating frequency and performance metrics.Key Responsibilities- Timing Sign-off and Analysis - Timing Closure Ownership: Drive all aspects of timing closure from pre-layout to post-layout for blocks, sub-systems, and/or the full chip. - Constraint Management: Develop, validate, and maintain Synopsys Design Constraints (SDC) and timing constraints for all functional and test modes (e.g., Scan, MBIST). - MMMC Analysis: Perform comprehensive timing analysis across multiple operating corners (Process, Voltage, Temperature - PVT) and various modes (Multi-Mode Multi-Corner). - Critical Path Identification: Analyze timing reports to identify and debug critical paths and resolve all Setup and Hold violations. - Signal Integrity (SI) & Noise: Incorporate advanced timing effects such as on-chip variation (OCV), signal integrity (crosstalk), and voltage drop (IR-drop aware STA) into the sign-off process.Methodology and Flow- Develop, maintain, and enhance STA flows and methodologies to improve efficiency, robustness, and reduce analysis runtime. - Automate repetitive tasks and report generation using scripting languages. - Generate final timing reports and sign-off collateral for tape-out.Education- Bachelor's or Master's degree in Electrical Engineering (EE), Electronics Engineering, VLSI, or a related field.Technical Skills & Experience- Experience: 3+ years of experience in STA. - EDA Tools: Expert proficiency with industry-standard Electronic Design Automation (EDA) tools from vendors like Synopsys (e.g., Fusion Compiler, ICC2, Primetime), Cadence (e.g., Innovus), or Mentor Graphics.Soft Skills- Excellent analytical, debugging, and problem-solving skills. - Strong verbal and written communication skills. - Ability to work effectively in a team environment and collaborate across different engineering disciplines.Experience Level :- 3yrs to 15yrsNotice Period :- Immediate to 60 DaysWork Location :- BangaloreMode of Work :- WFOEmployment Type :- Permanent
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STA Engineer
2 weeks ago
New Delhi, India ACL Digital Full timeJob Title: STA EngineerLocation: Banglaore/HyderabadEmployment Type: Full-timeIndustry: Semiconductors / VLSI / ASIC DesignJob Summary:We are looking for a skilled and motivated STA Engineer to join our backend implementation team. The engineer will be responsible for RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, targeting...
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STA Engineer
4 weeks ago
New Delhi, India Sintegra Inc. Full timeJob Summary:We are seeking a skilled STA Engineer with a strong background in Test and DFT architectures. The ideal candidate will have hands-on experience evaluating and writing high-quality timing constraints (SDCs) and performing thorough timing checks across complex digital designs.Key Responsibilities:- Analyze and validate timing constraints (SDC) for...
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STA CAD Engineer
3 weeks ago
New Delhi, India ACL Digital Full timeGreetings from ACL DigitalWe are looking for STA CAD Engineers.Experience Level:4+ years of STA CAD Job Description: STA CAD Engineer Location: Hyderabad and BangaloreJob Description: Bachelor's degree in Electrical or Computer Engineering and 4+ years STA (Timing, Constrains)/CAD experience or Master's degree and 2+ years' experience • Excellent...
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STA Engineer
3 weeks ago
New Delhi, India Mirafra Technologies Full timeJob Description:- STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. - Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. - Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. - Evaluate multiple timing methodologies/tools on different designs and...
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STA Engineer
4 weeks ago
New Delhi, India Mirafra Technologies Full timeJob Description : STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Evaluate multiple timing methodologies/tools on different designs and technology...
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STA CAD Engineer
4 weeks ago
New Delhi, India ACL Digital Full timeGreetings from ACL DigitalWe are looking for STA CAD Engineers.Experience Level:4+ years of STA CADJob Description: STA CAD EngineerLocation: Hyderabad and BangaloreJob Description:- Bachelor's degree in Electrical or Computer Engineering and 4+ years STA (Timing, Constrains)/CAD experience or Master's degree and 2+ years' experience - • Excellent...
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STA Engineer
3 days ago
New Delhi, India ACL Digital Full timeRole: STA EngineerExperience: 3+ YearsLocation: Bangalore (Onsite)Notice Period: Immediate to 30 Days / Serving NoticeKey Responsibilities:- Perform Static Timing Analysis (STA) at block and full-chip levels across multiple design stages (synthesis, P&R, sign-off). - Develop, validate, and maintain timing constraints (SDC files) for complex SoC and IP-level...
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STA Engineer
2 weeks ago
New Delhi, India Mirafra Technologies Full timeExp 5-8Yrs relevant Location- GermanyDeliverables and Results: Timing and power Signoff data Digital timing and power sign-off guidelines Reports, analysis and scripts (perl/python) to improve MethodologyRequirements: A sound knowledge in digital chip design including timing, power and IR drop analysis and verification as well as functional simulation Deep...
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Senior/Lead STA engineer
4 weeks ago
New Delhi, India ACL Digital Full timeWe’re Hiring: STA Engineer | 5–15 Years Experience | BangaloreCompany:ACL Digital Company Location:Bangalore Experience:5 to 15 Years Job Type:Full-TimeACL Digitalis looking forSenior Static Timing Analysis (STA) Engineerswith solid experience in timing closure of advanced SoC designs. If you’re an STA expert who thrives in fast-paced, technically...
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Senior/Staff STA Engineer
4 weeks ago
New Delhi, India Tenstorrent Full timeTenstorrent is looking for a skilled and detail-oriented Static Timing Analysis (STA) Engineer to help us deliver first-pass silicon success for our cutting-edge AI and RISC-V SoCs. Engineers with a strong foundation in Static Timing Analysis (STA) and timing constraints . In this role, you’ll lead timing closure efforts across block and full-chip levels,...
