Senior/Staff STA Engineer
3 days ago
Tenstorrent is looking for a skilled and detail-oriented Static Timing Analysis (STA) Engineer to help us deliver first-pass silicon success for our cutting-edge AI and RISC-V SoCs. Engineers with a strong foundation in Static Timing Analysis (STA) and timing constraints . In this role, you’ll lead timing closure efforts across block and full-chip levels, working closely with physical design, RTL, and verification teams across multiple technology nodes, including 5nm and 3nm.This role is onsite, based out of Bangalore.We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.Who You Are:- 5+ years of hands-on experience in STA for complex SoCs, spanning from block-level to full-chip analysis and closure. - Proven expertise in developing and validating timing constraints (SDF/SDC) for various design modes and PVT corners. - Comfortable using tools like PrimeTime, Tempus, or PTPX for timing signoff and power analysis. - Strong scripting skills in Tcl, Perl, or Python to automate timing flows and custom reporting. - Ability to collaborate across RTL, PD, DFT, and synthesis teams to debug and resolve timing issues efficiently.What We Need:- Ability to define and own STA methodology, including timing constraints development across different corners and modes (functional, scan, low-power, etc.). - Deep experience in reviewing and maintaining SDC constraints, validating them against design intent, and ensuring completeness and correctness. - Proficient in analyzing timing reports, fixing setup/hold violations, and closing timing at worst-case and best-case corners. - Familiarity with CDC analysis, false/multicycle path constraints, MMMC flows, and timing exception debugging. - Experience handling ECOs for timing and functional fixes, with strong focus on minimizing risk and turnaround time.What You Will Learn:- Tackle timing closure challenges on advanced nodes (e.g., 5nm, 3nm), with complex clocking and power architectures. - Collaborate across global teams to deliver high-performance, low-power silicon on aggressive schedules. - Improve and refine STA signoff flows, checklists, and timing constraint coverage metrics. - Develop deep debugging insight by working on real silicon use cases, pushing for first-silicon success.
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STA Engineers
5 days ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) EngineerJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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STA Engineer
3 days ago
New Delhi, India Sintegra Inc. Full timeJob Summary:We are seeking a skilled STA Engineer with a strong background in Test and DFT architectures. The ideal candidate will have hands-on experience evaluating and writing high-quality timing constraints (SDCs) and performing thorough timing checks across complex digital designs.Key Responsibilities:- Analyze and validate timing constraints (SDC) for...
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Senior/Lead STA engineer
5 days ago
New Delhi, India ACL Digital Full timeWe’re Hiring: STA Engineer | 5–15 Years Experience | BangaloreCompany:ACL Digital Company Location:Bangalore Experience:5 to 15 Years Job Type:Full-TimeACL Digitalis looking forSenior Static Timing Analysis (STA) Engineerswith solid experience in timing closure of advanced SoC designs. If you’re an STA expert who thrives in fast-paced, technically...
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STA Engineer
3 days ago
New Delhi, India Mirafra Technologies Full timeJob Description : STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Evaluate multiple timing methodologies/tools on different designs and technology...
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STA Engineer
2 days ago
New Delhi, India Mirafra Technologies Full timeJob Description:- STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. - Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. - Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. - Evaluate multiple timing methodologies/tools on different designs and...
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Senior STA Architect
5 days ago
New Delhi, India Eximietas Design Full timeHello All,Eximietas Design Hiring STA Engineers/Leads Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US.Job Description: Experience in Static Timing Analysis (STA) for ASIC designs. Experience in developing timing constraints. Experience in timing closure and...
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STA CAD Engineer
3 days ago
New Delhi, India ACL Digital Full timeGreetings from ACL DigitalWe are looking for STA CAD Engineers.Experience Level:4+ years of STA CADJob Description: STA CAD EngineerLocation: Hyderabad and BangaloreJob Description:- Bachelor's degree in Electrical or Computer Engineering and 4+ years STA (Timing, Constrains)/CAD experience or Master's degree and 2+ years' experience - • Excellent...
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STA Synthesis Engineer
2 weeks ago
New Delhi, India L&T Technology Services Full timeL&T Technology is looking to hire for STA Engineers.Job Location : BangaloreDetailed JD is below ::JD For STA Engineer-6+ ’ experience• Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs.• Can work closely with FE team for constraints development and constraints cleanup.• Work with...
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Static Timing Analysis
2 weeks ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) Engineer Job Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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Static Timing Analysis
3 days ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) EngineerJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
