STA Engineer
4 weeks ago
Job Summary:We are seeking a skilled STA Engineer with a strong background in Test and DFT architectures. The ideal candidate will have hands-on experience evaluating and writing high-quality timing constraints (SDCs) and performing thorough timing checks across complex digital designs.Key Responsibilities:- Analyze and validate timing constraints (SDC) for DFT architectures. - Develop and maintain accurate SDC files to support timing closure. - Collaborate with design and test teams to ensure timing integrity across scan, BIST, and other test modes. - Perform timing checks and quality assessments to identify and resolve constraint-related issues. - Contribute to the development of best practices for DFT timing constraint generation and validation.Required Qualifications:- Proven experience in STA with a focus on DFT/test modes. - Strong understanding of DFT architectures and their impact on timing. - Proficiency in writing and debugging SDCs. - Familiarity with industry-standard STA tools (e.g., PrimeTime, Tempus). - Excellent problem-solving and communication skills.Preferred Qualifications:- Experience with scan insertion, ATPG, and BIST flows. - Knowledge of RTL design and synthesis flows. - Exposure to timing ECOs and constraint refinement.
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STA Engineer
3 weeks ago
New Delhi, India ACL Digital Full timeJob Title: STA EngineerLocation: Banglaore/HyderabadEmployment Type: Full-timeIndustry: Semiconductors / VLSI / ASIC DesignJob Summary:We are looking for a skilled and motivated STA Engineer to join our backend implementation team. The engineer will be responsible for RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, targeting...
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STA Engineers
4 weeks ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) EngineerJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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STA Engineers
2 weeks ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) EngineerJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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STA CAD Engineer
3 weeks ago
New Delhi, India ACL Digital Full timeGreetings from ACL DigitalWe are looking for STA CAD Engineers.Experience Level:4+ years of STA CAD Job Description: STA CAD Engineer Location: Hyderabad and BangaloreJob Description: Bachelor's degree in Electrical or Computer Engineering and 4+ years STA (Timing, Constrains)/CAD experience or Master's degree and 2+ years' experience • Excellent...
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STA Engineer
3 weeks ago
New Delhi, India Mirafra Technologies Full timeJob Description:- STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. - Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. - Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. - Evaluate multiple timing methodologies/tools on different designs and...
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STA Engineer
4 weeks ago
New Delhi, India Mirafra Technologies Full timeJob Description : STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Evaluate multiple timing methodologies/tools on different designs and technology...
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STA CAD Engineer
4 weeks ago
New Delhi, India ACL Digital Full timeGreetings from ACL DigitalWe are looking for STA CAD Engineers.Experience Level:4+ years of STA CADJob Description: STA CAD EngineerLocation: Hyderabad and BangaloreJob Description:- Bachelor's degree in Electrical or Computer Engineering and 4+ years STA (Timing, Constrains)/CAD experience or Master's degree and 2+ years' experience - • Excellent...
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STA Engineer
3 days ago
New Delhi, India ACL Digital Full timeRole: STA EngineerExperience: 3+ YearsLocation: Bangalore (Onsite)Notice Period: Immediate to 30 Days / Serving NoticeKey Responsibilities:- Perform Static Timing Analysis (STA) at block and full-chip levels across multiple design stages (synthesis, P&R, sign-off). - Develop, validate, and maintain timing constraints (SDC files) for complex SoC and IP-level...
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STA Engineer
2 weeks ago
New Delhi, India Mirafra Technologies Full timeExp 5-8Yrs relevant Location- GermanyDeliverables and Results: Timing and power Signoff data Digital timing and power sign-off guidelines Reports, analysis and scripts (perl/python) to improve MethodologyRequirements: A sound knowledge in digital chip design including timing, power and IR drop analysis and verification as well as functional simulation Deep...
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Senior/Lead STA engineer
4 weeks ago
New Delhi, India ACL Digital Full timeWe’re Hiring: STA Engineer | 5–15 Years Experience | BangaloreCompany:ACL Digital Company Location:Bangalore Experience:5 to 15 Years Job Type:Full-TimeACL Digitalis looking forSenior Static Timing Analysis (STA) Engineerswith solid experience in timing closure of advanced SoC designs. If you’re an STA expert who thrives in fast-paced, technically...
