STA Synthesis Engineer

Looking for STA & Synthesis Engineer.Exp.-3.5+yrs.Job Location- Bangalore.Notice Period- Prefer Immediate joiner or less notice period.- Netlist and constraint sign in checks and validation. - Responsible to complete synthesis till final-opt with DFT insertion - Experience with sign-off Static Timing Analysis, Logic equivalency checks, and Static Low Power...

BE /BtechEXp- 5- 12 YrsWork on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm.• Take ownership of one or more physical design blocks includes all of, floorplan, CTS, PNR, QRC, STA, PV & IR.• Contribute to design methodology, flow automation.• Innovate & implement Power, Performance and Area optimization...

Role:STA Engineer Experience:3+ Years Location:Bangalore (Onsite) Notice Period:Immediate to 30 Days / Serving NoticeKey Responsibilities: PerformStatic Timing Analysis (STA)at block and full-chip levels across multiple design stages (synthesis, P&R, sign-off). Develop, validate, and maintaintiming constraints (SDC files)for complex SoC and IP-level designs....

Role: STA EngineerExperience: 3+ YearsLocation: Bangalore (Onsite)Notice Period: Immediate to 30 Days / Serving NoticeKey Responsibilities:- Perform Static Timing Analysis (STA) at block and full-chip levels across multiple design stages (synthesis, P&R, sign-off). - Develop, validate, and maintain timing constraints (SDC files) for complex SoC and IP-level...

Job Title: STA EngineerLocation: Banglaore/HyderabadEmployment Type: Full-timeIndustry: Semiconductors / VLSI / ASIC DesignJob Summary:We are looking for a skilled and motivated STA Engineer to join our backend implementation team. The engineer will be responsible for RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, targeting...

Static Timing Analysis (STA) EngineerJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...

Greetings from ACL DigitalWe are looking for STA CAD Engineers.Experience Level:4+ years of STA CAD Job Description: STA CAD Engineer Location: Hyderabad and BangaloreJob Description: Bachelor's degree in Electrical or Computer Engineering and 4+ years STA (Timing, Constrains)/CAD experience or Master's degree and 2+ years' experience • Excellent...

Requirement Details: Role:Synthesis Engineer Experience:4+ years Location:Bangalore (Preferred)Skill Set: Hands-on experience inlogic synthesis using Design Compiler Strong understanding oftiming ,low-power requirements , andconstraints validation

We're Hiring – STA Engineer (Tempus Experience) | #BangaloreJoin Mirafra Technologies, a leading name in VLSI design and innovation, and be part of a dynamic engineering team!Position: STA EngineerExperience: 4+ YearsLocation: BangaloreKey Skills & Responsibilities:- Strong working knowledge of Synthesis, LEC, and STA concepts. - Hands-on experience in...

Exp 5-8Yrs relevant Location- GermanyDeliverables and Results: Timing and power Signoff data Digital timing and power sign-off guidelines Reports, analysis and scripts (perl/python) to improve MethodologyRequirements: A sound knowledge in digital chip design including timing, power and IR drop analysis and verification as well as functional simulation Deep...