
Layout Designer
2 days ago
Role and Responsibilities
- Collaborating with the global team to coordinate the complete layout of the plant while maintaining effective team.
• Excellent communication skills, along with hands-on expertise, are required, and being a team player is crucial.
• Responsible for Layout design and development of critical analog and custom digital block.
• Perform layout verification like LVS/DRC/Antenna, quality check and documentation.
• Responsible for on-time delivery of block-level layouts with acceptable quality.
• Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation, and execution to meet project schedule/milestones in multiple project environment.
• Guide junior team-members in their execution of Sub block-level layouts & review their work.
• Contribute to effective project-management.
• Effectively communicating with Global engineering teams to assure the success of layout project.
Qualification/Requirements
- 7 to 8-year experience in memory/analog/custom layout design in advanced CMOS process.
• A strong understanding of memory design methodology and related issues is important.
• The candidate should be well-versed in various levels of memory layouts, including custom memory bits, leaf cells, control blocks, read-write components, sense amplifiers, and decoders.
• Should have hands on experience in creating layout of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,
• Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must.
• Good understanding of Analog Layout fundamentals (e.g., Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices etc.)
• Understanding layout effects on the circuit such as speed, capacitance, power, and area etc.,
• Ability to understand design constraints and implement high-quality layouts.
• Excellent command and problem-solving skills in physical verification of custom layout.
• Multiple Tape out support experience will be an added advantage.
• Excellent verbal and written communication skills.
Education
BE or MTech in Electronic/VLSI Engineering
Must Haves: MANDATE:
• A strong understanding of memory design methodology and related issues is important.
• The candidate should be well-versed in various levels of memory layouts, including custom memory bits, leaf cells, control blocks, read-write components, sense amplifiers, and decoders.
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