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Lead Memory Layout Design Engineer

2 weeks ago

Hyderabad, Telangana, India Incise Infotech Limited Full time ₹ 15,00,000 - ₹ 20,00,000 per year

Company Description

Incise Infotech Ltd
is a technology company specializing in semiconductor design, IT services, and product development. The company provides services in SOC and IP verification, RTL design, virtual prototyping, memory layout design, IO layout design, analog mixed-signal design, and more. Incise Infotech invites the world's top talent to work on cutting-edge semiconductor SOCs and software solutions, aiming to produce the best practices and products to simplify life. The company's diverse expertise makes it a leader in the technology domain.

Role Description

This is a full-time, on-site role for a
Lead Memory Layout Design Engineer
located in
Noida.
The Lead Memory Layout Design Engineer will be responsible for designing and verifying memory layouts, working on circuit design, and ensuring the quality and functionality of analog circuits. Day-to-day tasks will include layout design, physical verification, and collaborating with other teams to optimize design processes and achieve project goals.

𝐄𝐱𝐩𝐞𝐫𝐢𝐞𝐧𝐜𝐞 : 7+ 𝐘𝐞𝐚𝐫𝐬

𝐋𝐨𝐜𝐚𝐭𝐢𝐨𝐧 : 𝐍𝐨𝐢𝐝𝐚

𝐑𝐞𝐪𝐮𝐢𝐫𝐞𝐝 𝐒𝐤𝐢𝐥𝐥𝐬 & 𝐄𝐱𝐩𝐞𝐫𝐢𝐞𝐧𝐜𝐞 :

7+ years of experience in memory layout design.

Strong expertise in SRAM, ROM, Register File, and other memory architectures.

Proficiency with EDA tools: Cadence Virtuoso, Synopsys Custom Compiler, Mentor Graphics Calibre (DRC/LVS), etc.

Solid understanding of deep sub-micron technologies (16nm, 7nm, 5nm, etc.).

Knowledge of parasitic effects, IR drop, electromigration, and reliability considerations.

Strong debugging, problem-solving, and teamwork skills.

𝐇𝐨𝐰 𝐭𝐨 𝐀𝐩𝐩𝐥𝐲

𝐈𝐧𝐭𝐞𝐫𝐞𝐬𝐭𝐞𝐝 𝐜𝐚𝐧𝐝𝐢𝐝𝐚𝐭𝐞𝐬 𝐜𝐚𝐧 𝐬𝐡𝐚𝐫𝐞 𝐭𝐡𝐞𝐢𝐫 𝐂𝐕 𝐚𝐭 𝐰𝐢𝐭𝐡 𝐭𝐡𝐞 𝐬𝐮𝐛𝐣𝐞𝐜𝐭 𝐥𝐢𝐧𝐞:

𝐀𝐩𝐩𝐥𝐢𝐜𝐚𝐭𝐢𝐨𝐧 𝐟𝐨𝐫 𝐌𝐞𝐦𝐨𝐫𝐲 𝐋𝐚𝐲𝐨𝐮𝐭 𝐃𝐞𝐬𝐢𝐠𝐧 𝐄𝐧𝐠𝐢𝐧𝐞𝐞𝐫 – 𝐍𝐨𝐢𝐝𝐚