Memory Layout Engineer
1 week ago
Hello Connections,
Greetings from ElevarSoC
We are hiring for
Memory Layout Engineer
with
3-8 Years
of
Experience
for
Bangalore
location.
hashtag#Bangalore
Immediate / 2 weeks preferred
hashtag#
Below the jd
Technical Skills:
Experience in Memory/Custom Layout design.
Memory Leafcell layout library design from scratch including top level integration.
Good knowledge on different types of memory architectures.
Good knowledge in optimized layout design for better performance.
Sound knowledge & hands on experience in Finfet technology, layout design and DRC limitations.
Proficient in physical verification flow & debug, like DRC, LVS, ERC, Boundary conditions.
Proficient in Cadence Virtuoso layout editor and Calibre physical verification flow.
Share your resume to
hashtag#Bangalorejobs hashtag#jobs # Memory Layout hashtag#Engineer hashtag#Custom Layout hashtag#Memory Leaf#memory Architecture#Design# Finfet Technology#Cell Aware #hashtag#DRV hashtag#ERC#LVS hashtag#Cadence hashtag#Calibre #Physical Verfication flow# Join our team
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